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On Apr 12, 2011, at 9:34 AM, Peter Bigot <[email protected]> wrote: > The user's guide states that if you write to DMA0SA using a word > instruction, the upper bits 19-16 will be cleared, so you should be > fine as long as you aren't trying to DMA to/from addresses above 64KB. yep read that. I'm explicitly trying to write the full 20 bit register. At some point the dma driver could support 20 bit addresses and I'm wondering how to do it. I've got 16 bit addresses working fine. > If you do want to do far pointer support before mspgcc supports it, > you can use mov.a in asm statements; google or somebody else may be > able to provide more information on how to do that. > > Several of the peripherals on the MSP430 do not accept 8-bit access. > The most recent header update from TI removed the 8-bit sub-register > definitions for TimerA and TimerD[sic] on a couple chips because byte > access did not work. Reference the registers through the > header-defined variables rather than assuming that knowing the address > is all you need. Doing that. I'm referencing DMA0SA for example through the TI define. And I'm seeing two mov (16 bit) inst generated. the first hits the low half of SA and zeros the upper 4 bits. the 2nd mov hits the upper half but does nothing. Seems the only way to access the upper part of 20 bit registers is via a movx. but I'm not sure about that because I haven't figured out how to generate the instruction yet. Does anyone have information about the behavior of 20 bit registers. and I'm talking about the 2617 processor. although I'm also interested in any information about the cc430f5137 and/or the 5438. > > Peter > > On Tue, Apr 12, 2011 at 8:18 AM, Eric Decker <[email protected]> wrote: >> Hi, >> >> 1st before anything else... Is there a reasonable way to search the >> mspgcc-users archive? >> I've poked around a bit and doesn't seem to be. >> >> I'm playing with the dma engines on the msp430f2617. I've written a unified >> driver that >> handles all three main processor varients. (x1: msp430f1611, x2: >> msp430f2617, and x5: >> cc430f5137, msp430f5438). Am currently testing on the 2617. >> >> Currently using the old z1 varient of mspgcc 3.2.3 and am trying to figure >> out how one >> goes about messing with the 20 bit DMA0SA periphreg and its friends. >> >> On the 2617, the DMA registers are in the 0x1xx 16 bit i/o register space >> which behaves >> strangely. That is it seems that one must reference it with 16 bit >> instructions (mov >> vs. mov.b) and addresses have to be short aligned. >> >> I'm trying to figure out how to set the upper 4 bits. The registers are >> laid out as a 32 bit >> long word. When I reference the register as a ulong the code generated is >> two 16 bit >> mov's. The first writes the low order 16 (which clears the upper as it >> should and as >> documented). The second does nothing. These are normal mov's. >> >> I'm thinking that I need to use mov.a or mov.x. I tried messing a little >> bit with >> the assembler syntax in C but didn't get very far so am asking for help with >> that. >> >> Any thoughts on the matter? >> >> I wanted to search the archive for mov.a but that yielded nonsense. >> >> -- >> Eric B. Decker >> Senior (over 50 :-) Researcher >> >> >> >> _______________________________________________ >> tinyos-msp430 mailing list >> [email protected] >> https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-msp430 >> >> ------------------------------------------------------------------------------ Forrester Wave Report - Recovery time is now measured in hours and minutes not days. Key insights are discussed in the 2010 Forrester Wave Report as part of an in-depth evaluation of disaster recovery service providers. Forrester found the best-in-class provider in terms of services and vision. Read this report now! http://p.sf.net/sfu/ibm-webcastpromo _______________________________________________ Mspgcc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/mspgcc-users
