----- Ursprüngliche Nachricht -----
Von: Eric Decker
Gesendet am: 12 Apr 2011 21:58:58
>> The user's guide states that if you write to DMA0SA using a word
>> instruction, the upper bits 19-16 will be cleared, so you should be
>> fine as long as you aren't trying to DMA to/from addresses above 64KB.
> yep read that. I'm explicitly trying to write the full 20 bit register.
> At some point the dma driver could support 20 bit addresses and I'm wondering
> how to do it.
The 20 bit registers need to be written to with a 20 bit instruction such as
MOVA or MOVX.A (note: there is no MOV.A)
Source of the MOVA or MOVX.A instruction may be a 32 bit (long) variable as
long as it is in memory.
However, the MOVA instruciton may only take one memory operand, the other must
be a register, so you either move the value to a register and then to
the destination, or you use MOVX.A instruction. Both ways are same resulting
size, bu tthe second does not clobber a register.
The assembly instruction would be
asm("movx.a %1, %0":"=m"(destination):"m"(source));
The two parts behind the instruction tell the compiler to provide the source in
a memory location (and that the destination is a memory location), even if it
currently resides in a (or rather two) registers (register
variable, function parameter). This is necessary, as there is no way to concat
two registers to a 20 bit value other than writing them to a 32 bit memory
location and then loading from there.
The GCC inline assembly syntax is really powerful, if you know to use it right
(which isn't easy)
Be careful that this instruction is not interrupted by a DMA transfer as this
will corrupt the write. (the RMW disable flag won't work here, as the microcode
is performing two writes which may not be interrupted)
(It's in the 54xx errata sheet IIRC)
>> Several of the peripherals on the MSP430 do not accept 8-bit access.
>> The most recent header update from TI removed the 8-bit sub-register
>> definitions for TimerA and TimerD[sic] on a couple chips because byte
>> access did not work. Reference the registers through the
>> header-defined variables rather than assuming that knowing the address
>> is all you need.
> Doing that. I'm referencing DMA0SA for example through the TI define. And
> I'm seeing two mov (16 bit) inst generated. the first hits the low half of
> SA and zeros the upper 4 bits. the 2nd mov hits
> the upper half but does nothing.
Yep. in mspgcc, those registers are defined using sfra macro, but this only
defines them as volatile unsigned long word. The compilers default action will
be a normal 2*16 bit access.
BTW: the DMA config registers (with the DMA triggers) are 16 bit acess only.
The original documentation as well as the TI defines provided _L and _H aliases
which didn't work (which was the original reason that
brought me to the E2E community.
> Seems the only way to access the upper part of 20 bit registers is via a
> movx. but I'm not sure about that because I haven't figured out how to
> generate the instruction yet.
MOVA will do as well, but not for memory-to-memory operations. All other xxxA
instructions do only register to register (but are shorter and faster than
their yyyX.A counterparts)
> Does anyone have information about the behavior of 20 bit registers. and
> I'm talking about the 2617 processor. although I'm also interested in any
> information about the cc430f5137 and/or the 5438.
My experiences are with the 5438. The CC is same base family and therefore
mostly identical (I don't think there are differences in the cpu core)
I don't know about the 2617, I think, at least the MSP430X instruciton set is
identical, but the DMA might differ.
JMGross
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