----- Ursprüngliche Nachricht -----
Von: Wayne Uroda
An: GCC for MSP430 - http://mspgcc.sf.net
Gesendet am: 16 Mrz 2012 05:39:38
Betreff: [Mspgcc-users] iostructures

> I notice that iostructures.h hasn't been a part of the MSPGCC project for a=
> while now...

> If there is a compelling technical reason to not access pins through struct=
> ures such as these, does anybody have suggestions as to how they do it, and=
> why?

Besides the informations given by Peter, there is a technical reason why those 
structures are not a good idea:
Hardware registers are volatile. Because of possible side-effects, the compiler
has to do any access to them exactly as in the source code.
If one accesses more than one bit in a register, each bit access is a separate
read-modify-write instruction.
So 
TACTL.TASSEL = 2; TACTL.MC=1; TACTL.TACLR=1; TACTL.TAIE=1;
are four separate instrucitons, reading, calculating and writing to TACTL.
TACTL= TASSEL_2|MC_1|TACLR|TAIE;
Is one instruction. And the changes take place at the same time too.
So while the isostructures are maybe nicer to read, not using them is more 
efficient.

The only real advantage (for less experienced programmers) I see in 
iostructures is
the assignment of values to bitfields (like TASSELx).
I've seen people who did
TACTL |= MC_2
and later
TACTL |= MC_1;
Which does not give the desired result.
A TACTL &= MC_3; (or MC_MASK) is required to ensure that it works as expected.
Assigning 2 and later 1 to TACTL.MC would always work as expected, because
the compiler then does the proper masking of all bits fo the bitfield.
This is actually a real world example, since the timer registers are not cleared
on a PUC, only on a BOR. So if the code simply assumes BOR register codition...

However, doing the proper masking in an assignment does the job as well, and not
less efficient.

JMGross

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