Previously, I used mspgcc 3.2.3 and everything worked. When I installed the new
version mspgcc 4.6.3, I had a few warnings:
pp_main.c: In function 'periodic_mem_test':
pp_main.c:930:1: warning: frame allocation destroys caller register due to
'task' [-Wattributes]
pp_main.c: In function '_reset_vector__':
pp_main.c:1142:1: warning: frame allocation destroys caller register due to
'task' [-Wattributes]
__attribute__ ((naked))
void
periodic_mem_test()
{
{
#define fl__ R15__
#define cs2__ R15__
#define cs1__ R14__
register int16_t R15__ __asm__("r15");
register int16_t R14__ __asm__("r14");
FLETCHER(cs1__,
&___pp_data_tested_start,
&___pp_data_tested_end);
MEMORY_COPY(&___pp_data_tested_start,
&___pp_data_tested_end,
&___pp_data_tested_cp_start);
fl__ = RST_CIRCUIT_PROCESSING;
MEMORY_TEST(fl__,
&___pp_data_tested_start,
&___pp_data_tested_end);
if(fl__ != RST_CIRCUIT_PASSED)
{
SOFT_RESET();
}
MEMORY_COPY(&___pp_data_tested_cp_start,
&___pp_data_tested_cp_end,
&___pp_data_tested_start);
FLETCHER(cs2__,
&___pp_data_tested_start,
&___pp_data_tested_end);
if(cs2__ != cs1__)
{
SOFT_RESET();
}
}
TEST_INFO_MEM_VAR(_Iframe_main_pp)
{
SOFT_RESET();
}
TEST_INFO_MEM_VAR(_Ilen_frame_main_pp)
{
SOFT_RESET();
}
TEST_INFO_MEM_VAR(_Iframe_alarm_pp)
{
SOFT_RESET();
}
TEST_INFO_MEM_VAR(_Ilen_frame_alarm_pp)
{
SOFT_RESET();
}
Gfl_circuit_test_pass = RST_CIRCUIT_PROCESSING;
ROM_TEST(Gfl_circuit_test_pass,
&___pp_code_end,
&___pp_code_start,
&___pp_code_cp_start);
if(Gfl_circuit_test_pass != RST_CIRCUIT_PASSED)
{
SOFT_RESET();
}
Gfl_circuit_test_pass = RST_CIRCUIT_PROCESSING;
ROM_TEST(Gfl_circuit_test_pass, 0xFFE0, 0xFFC0, 0xFFE0);
if(Gfl_circuit_test_pass != RST_CIRCUIT_PASSED)
{
SOFT_RESET();
}
Gfl_circuit_test_pass = RST_CIRCUIT_PROCESSING;
ROM_TEST_M(Gfl_circuit_test_pass,
_Ilen_frame_main_pp,
_Iframe_main_pp);
if(Gfl_circuit_test_pass != RST_CIRCUIT_PASSED)
{
SOFT_RESET();
}
Gfl_circuit_test_pass = RST_CIRCUIT_PROCESSING;
ROM_TEST_M(Gfl_circuit_test_pass,
_Ilen_frame_alarm_pp,
_Iframe_alarm_pp);
if(Gfl_circuit_test_pass != RST_CIRCUIT_PASSED)
{
SOFT_RESET();
}
RET;
}
_RESET()
{
WDTCTL = WDTPW + WDTHOLD;
dint();
P5DIR = 0;
P5OUT = 0;
BITS_ON(P5OUT, ANT_DATA);
BITS_ON(P5DIR, BIT0 | ANT_DATA | BIT4 | BIT6 | BIT7);
P5SEL = 0;
BITS_ON(P5SEL, ACLK);
BITS_OFF(P6OUT, ADC_1);
BITS_OFF(P6OUT, ADC_2);
BITS_OFF(P6OUT, BIT2);
BITS_OFF(P6OUT, BIT3);
BITS_OFF(P6OUT, BIT4);
BITS_OFF(P6OUT, BIT5);
BITS_OFF(P6OUT, BIT6);
BITS_OFF(P6OUT, BIT7);
P6DIR = 0xFF;
P6SEL = 0;
P2OUT = 0;
P2DIR = 0;
BITS_ON(P2DIR, I_AM_READY1 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7);
P2SEL = 0;
P2IFG = 0;
P2IES = 0;
P2IE = 0;
__asm__ __volatile__("br #main"::);
}
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