Because of the split memory regions in the MSP430, you need to use
-ffunction-sections and -fdata-sections along with -Wl,-gc-sections so that
each component is placed in a separate section. The linker then assigns
each component to either near or far memory.
If you don't use those options, everything gets aggregated together into a
big blob that won't fit.
Or there may be something wrong with the linker customization.
Peter
On Wed, Feb 27, 2013 at 8:48 AM, Dan <d...@meta-designs.com> wrote:
> I am trying to build an app targetting large memory
> model to test a bootloader
> with access to memory above 64k on MSP430F2417.
> I have my own custom script which allocates some
> space for the bootloader
> (tsbootloader section allocates 8kB).
> I can’t work out why I am getting the following error
> from the linker when
> building the app. Is it an issue with the script
> (in the attachment)?
>
> msp430-gcc -mmcu=msp430f2417 -mcpu=430x -mmemory-model=large -Wl,-T
> ../ht-user-msp430x2417.x ...
>
> c:/mspgcc/bin/../lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld.exe:
> ht-r2001.elf section `.data' will not fit in region `rom'
> c:/mspgcc/bin/../lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld.exe:
> section
> .vectors loaded at [0000dfc0,0000dfff] overlaps section .data loaded at
> [0000dfb4,0000e083]
> c:/mspgcc/bin/../lib/gcc/msp430/4.7.0/../../../../msp430/bin/ld.exe: region
> `rom' overflowed by 196 bytes
>
>
>
> /* Customized linker script ht-user-msp430x2417.x */
> OUTPUT_FORMAT("elf32-msp430")
> OUTPUT_ARCH("msp430")
> MEMORY {
> sfr : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size
> 16 */
> peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0 /* END=0x0100, size
> 240*/
> peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size
> 256*/
> ram_mirror (wx) : ORIGIN = 0x0200, LENGTH = 0x0800 /* END=0x0a00, size
> 2K */
> infomem : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x1100, size
> 256*/
> infod : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x1040, size
> 64 */
> infoc : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x1080, size
> 64 */
> infob : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10c0, size
> 64 */
> infoa : ORIGIN = 0x10c0, LENGTH = 0x0040 /* END=0x1100, size
> 64 */
> ram (wx) : ORIGIN = 0x1100, LENGTH = 0x2000 /* END=0x3100, size
> 8K */
> rom (rx) : ORIGIN = 0x3100, LENGTH = 0xaec0 /* END=0xDFC0, s
> 44736 */
> vectors : ORIGIN = 0xdfc0, LENGTH = 0x0040 /* END=0xE000, size
> 64 */
> tsbootloader(rx) : ORIGIN = 0xe000, LENGTH = 0x2000 /* END=0x10000, size
> 8K */
> far_rom : ORIGIN = 0x10000, LENGTH = 0xa000 /* END=0x0001a000,
> */
> /* Remaining banks are absent */
> bsl : ORIGIN = 0x0000, LENGTH = 0x0000
> ram2 (wx) : ORIGIN = 0x0000, LENGTH = 0x0000
> usbram (wx) : ORIGIN = 0x0000, LENGTH = 0x0000
> }
> REGION_ALIAS("REGION_TEXT", rom);
> REGION_ALIAS("REGION_DATA", ram);
> REGION_ALIAS("REGION_FAR_ROM", far_rom); /* Legacy name, no longer used */
> REGION_ALIAS("REGION_FAR_TEXT", far_rom);
> REGION_ALIAS("REGION_FAR_DATA", ram2);
> PROVIDE (__info_segment_size = 0x40);
> PROVIDE (__infod = 0x1000);
> PROVIDE (__infoc = 0x1040);
> PROVIDE (__infob = 0x1080);
> PROVIDE (__infoa = 0x10c0);
>
> __IE1 = 0x0000;
> __IFG1 = 0x0002;
> __IE2 = 0x0001;
> __IFG2 = 0x0003;
> __UC1IE = 0x0006;
> __UC1IFG = 0x0007;
> __ADC12CTL0 = 0x01A0;
> __ADC12CTL1 = 0x01A2;
> __ADC12IFG = 0x01A4;
> __ADC12IE = 0x01A6;
> __ADC12IV = 0x01A8;
> __ADC12MEM0 = 0x0140;
> __ADC12MEM1 = 0x0142;
> __ADC12MEM2 = 0x0144;
> __ADC12MEM3 = 0x0146;
> __ADC12MEM4 = 0x0148;
> __ADC12MEM5 = 0x014A;
> __ADC12MEM6 = 0x014C;
> __ADC12MEM7 = 0x014E;
> __ADC12MEM8 = 0x0150;
> __ADC12MEM9 = 0x0152;
> __ADC12MEM10 = 0x0154;
> __ADC12MEM11 = 0x0156;
> __ADC12MEM12 = 0x0158;
> __ADC12MEM13 = 0x015A;
> __ADC12MEM14 = 0x015C;
> __ADC12MEM15 = 0x015E;
> __ADC12MCTL0 = 0x0080;
> __ADC12MCTL1 = 0x0081;
> __ADC12MCTL2 = 0x0082;
> __ADC12MCTL3 = 0x0083;
> __ADC12MCTL4 = 0x0084;
> __ADC12MCTL5 = 0x0085;
> __ADC12MCTL6 = 0x0086;
> __ADC12MCTL7 = 0x0087;
> __ADC12MCTL8 = 0x0088;
> __ADC12MCTL9 = 0x0089;
> __ADC12MCTL10 = 0x008A;
> __ADC12MCTL11 = 0x008B;
> __ADC12MCTL12 = 0x008C;
> __ADC12MCTL13 = 0x008D;
> __ADC12MCTL14 = 0x008E;
> __ADC12MCTL15 = 0x008F;
> __DCOCTL = 0x0056;
> __BCSCTL1 = 0x0057;
> __BCSCTL2 = 0x0058;
> __BCSCTL3 = 0x0053;
> __CACTL1 = 0x0059;
> __CACTL2 = 0x005A;
> __CAPD = 0x005B;
> __FCTL1 = 0x0128;
> __FCTL2 = 0x012A;
> __FCTL3 = 0x012C;
> __FCTL4 = 0x01BE;
> __MPY = 0x0130;
> __MPYS = 0x0132;
> __MAC = 0x0134;
> __MACS = 0x0136;
> __OP2 = 0x0138;
> __RESLO = 0x013A;
> __RESHI = 0x013C;
> __SUMEXT = 0x013E;
> __P1IN = 0x0020;
> __P1OUT = 0x0021;
> __P1DIR = 0x0022;
> __P1IFG = 0x0023;
> __P1IES = 0x0024;
> __P1IE = 0x0025;
> __P1SEL = 0x0026;
> __P1REN = 0x0027;
> __P2IN = 0x0028;
> __P2OUT = 0x0029;
> __P2DIR = 0x002A;
> __P2IFG = 0x002B;
> __P2IES = 0x002C;
> __P2IE = 0x002D;
> __P2SEL = 0x002E;
> __P2REN = 0x002F;
> __P3IN = 0x0018;
> __P3OUT = 0x0019;
> __P3DIR = 0x001A;
> __P3SEL = 0x001B;
> __P3REN = 0x0010;
> __P4IN = 0x001C;
> __P4OUT = 0x001D;
> __P4DIR = 0x001E;
> __P4SEL = 0x001F;
> __P4REN = 0x0011;
> __P5IN = 0x0030;
> __P5OUT = 0x0031;
> __P5DIR = 0x0032;
> __P5SEL = 0x0033;
> __P5REN = 0x0012;
> __P6IN = 0x0034;
> __P6OUT = 0x0035;
> __P6DIR = 0x0036;
> __P6SEL = 0x0037;
> __P6REN = 0x0013;
> __P7IN = 0x0038;
> __P7OUT = 0x003A;
> __P7DIR = 0x003C;
> __P7SEL = 0x003E;
> __P7REN = 0x0014;
> __P8IN = 0x0039;
> __P8OUT = 0x003B;
> __P8DIR = 0x003D;
> __P8SEL = 0x003F;
> __P8REN = 0x0015;
> __PAIN = 0x0038;
> __PAOUT = 0x003A;
> __PADIR = 0x003C;
> __PASEL = 0x003E;
> __PAREN = 0x0014;
> __SVSCTL = 0x0055;
> __TAIV = 0x012E;
> __TACTL = 0x0160;
> __TACCTL0 = 0x0162;
> __TACCTL1 = 0x0164;
> __TACCTL2 = 0x0166;
> __TAR = 0x0170;
> __TACCR0 = 0x0172;
> __TACCR1 = 0x0174;
> __TACCR2 = 0x0176;
> __TBIV = 0x011E;
> __TBCTL = 0x0180;
> __TBCCTL0 = 0x0182;
> __TBCCTL1 = 0x0184;
> __TBCCTL2 = 0x0186;
> __TBCCTL3 = 0x0188;
> __TBCCTL4 = 0x018A;
> __TBCCTL5 = 0x018C;
> __TBCCTL6 = 0x018E;
> __TBR = 0x0190;
> __TBCCR0 = 0x0192;
> __TBCCR1 = 0x0194;
> __TBCCR2 = 0x0196;
> __TBCCR3 = 0x0198;
> __TBCCR4 = 0x019A;
> __TBCCR5 = 0x019C;
> __TBCCR6 = 0x019E;
> __UCA0CTL0 = 0x0060;
> __UCA0CTL1 = 0x0061;
> __UCA0BR0 = 0x0062;
> __UCA0BR1 = 0x0063;
> __UCA0MCTL = 0x0064;
> __UCA0STAT = 0x0065;
> __UCA0RXBUF = 0x0066;
> __UCA0TXBUF = 0x0067;
> __UCA0ABCTL = 0x005D;
> __UCA0IRTCTL = 0x005E;
> __UCA0IRRCTL = 0x005F;
> __UCB0CTL0 = 0x0068;
> __UCB0CTL1 = 0x0069;
> __UCB0BR0 = 0x006A;
> __UCB0BR1 = 0x006B;
> __UCB0I2CIE = 0x006C;
> __UCB0STAT = 0x006D;
> __UCB0RXBUF = 0x006E;
> __UCB0TXBUF = 0x006F;
> __UCB0I2COA = 0x0118;
> __UCB0I2CSA = 0x011A;
> __UCA1CTL0 = 0x00D0;
> __UCA1CTL1 = 0x00D1;
> __UCA1BR0 = 0x00D2;
> __UCA1BR1 = 0x00D3;
> __UCA1MCTL = 0x00D4;
> __UCA1STAT = 0x00D5;
> __UCA1RXBUF = 0x00D6;
> __UCA1TXBUF = 0x00D7;
> __UCA1ABCTL = 0x00CD;
> __UCA1IRTCTL = 0x00CE;
> __UCA1IRRCTL = 0x00CF;
> __UCB1CTL0 = 0x00D8;
> __UCB1CTL1 = 0x00D9;
> __UCB1BR0 = 0x00DA;
> __UCB1BR1 = 0x00DB;
> __UCB1I2CIE = 0x00DC;
> __UCB1STAT = 0x00DD;
> __UCB1RXBUF = 0x00DE;
> __UCB1TXBUF = 0x00DF;
> __UCB1I2COA = 0x017C;
> __UCB1I2CSA = 0x017E;
> __WDTCTL = 0x0120;
> __TLV_CHECKSUM = 0x10C0;
> __TLV_DCO_30_TAG = 0x10F6;
> __TLV_DCO_30_LEN = 0x10F7;
> __TLV_ADC12_1_TAG = 0x10DA;
> __TLV_ADC12_1_LEN = 0x10DB;
> __CALDCO_16MHZ = 0x10F8;
> __CALBC1_16MHZ = 0x10F9;
> __CALDCO_12MHZ = 0x10FA;
> __CALBC1_12MHZ = 0x10FB;
> __CALDCO_8MHZ = 0x10FC;
> __CALBC1_8MHZ = 0x10FD;
> __CALDCO_1MHZ = 0x10FE;
> __CALBC1_1MHZ = 0x10FF;
>
> SECTIONS
> {
> /* Read-only sections, merged into text segment. */
> .hash : { *(.hash) }
> .dynsym : { *(.dynsym) }
> .dynstr : { *(.dynstr) }
> .gnu.version : { *(.gnu.version) }
> .gnu.version_d : { *(.gnu.version_d) }
> .gnu.version_r : { *(.gnu.version_r) }
> .rel.init : { *(.rel.init) }
> .rela.init : { *(.rela.init) }
> .rel.fini : { *(.rel.fini) }
> .rela.fini : { *(.rela.fini) }
> .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
> }
> .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
> }
> .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
> }
> .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
> }
> .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
> }
> .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
> }
> .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
> }
> .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
> }
> .rel.ctors : { *(.rel.ctors) }
> .rela.ctors : { *(.rela.ctors) }
> .rel.dtors : { *(.rel.dtors) }
> .rela.dtors : { *(.rela.dtors) }
> .rel.got : { *(.rel.got) }
> .rela.got : { *(.rela.got) }
> .rel.plt : { *(.rel.plt) }
> .rela.plt : { *(.rela.plt) }
> /* .any.{text,rodata,data,bss}{,.*} sections are treated as orphans and
> * placed in output sections with available space by linker. Do not list
> * them here, or the linker will not consider them orphans. */
>
> /* Tanksensor/HyDip bootloader. */
> .tsbootloader :
> {
> PROVIDE (__bl_start = .) ;
> *(.tsbootloader)
> . = ALIGN(2);
> *(.tsbootloader.*)
> } > tsbootloader
>
> .text :
> {
> . = ALIGN(2);
> KEEP(*(.init .init.*))
> KEEP(*(.init0)) /* Start here after reset. */
> KEEP(*(.init1)) /* User definable. */
> KEEP(*(.init2)) /* Initialize stack. */
> KEEP(*(.init3)) /* Initialize hardware, user definable. */
> KEEP(*(.init4)) /* Copy data to .data, clear bss. */
> KEEP(*(.init5)) /* User definable. */
> KEEP(*(.init6)) /* C++ constructors. */
> KEEP(*(.init7)) /* User definable. */
> KEEP(*(.init8)) /* User definable. */
> KEEP(*(.init9)) /* Call main(). */
> KEEP(*(.fini9)) /* Falls into here after main(). User definable. */
> KEEP(*(.fini8)) /* User definable. */
> KEEP(*(.fini7)) /* User definable. */
> KEEP(*(.fini6)) /* C++ destructors. */
> KEEP(*(.fini5)) /* User definable. */
> KEEP(*(.fini4)) /* User definable. */
> KEEP(*(.fini3)) /* User definable. */
> KEEP(*(.fini2)) /* User definable. */
> KEEP(*(.fini1)) /* User definable. */
> KEEP(*(.fini0)) /* Infinite loop after program termination. */
> KEEP(*(.fini .fini.*))
> . = ALIGN(2);
> __ctors_start = .;
> KEEP(*(.ctors))
> __ctors_end = .;
> __dtors_start = .;
> KEEP(*(.dtors))
> __dtors_end = .;
> . = ALIGN(2);
> *(.text .text.* .gnu.linkonce.t.*)
> *(.near.text .near.text.*)
> } > REGION_TEXT
> .rodata :
> {
> . = ALIGN(2);
> *(.rodata .rodata.* .gnu.linkonce.r.*)
> *(.near.rodata .near.rodata.*)
> } > REGION_TEXT
> . = ALIGN(2);
> _etext = .; /* Past last read-only (loadable) segment */
> .data :
> {
> . = ALIGN(2);
> __data_start = .;
> *(.data .data.* .gnu.linkonce.d.*)
> *(.near.data .near.data.*)
> . = ALIGN(2);
> _edata = .; /* Past last read-write (loadable) segment */
> } > REGION_DATA AT > REGION_TEXT
> __data_load_start = LOADADDR(.data);
> __data_size = SIZEOF(.data);
> .bss :
> {
> __bss_start = .;
> *(.bss .bss.*)
> *(.near.bss .near.bss.*)
> *(COMMON)
> . = ALIGN(2);
> __bss_end = .;
> } > REGION_DATA
> __bss_size = SIZEOF(.bss);
> .noinit :
> {
> . = ALIGN(2);
> __noinit_start = .;
> *(.noinit .noinit.*)
> . = ALIGN(2);
> __noinit_end = .;
> } > REGION_DATA
> . = ALIGN(2);
> _end = .; /* Past last write (loadable) segment */
> .infomem :
> {
> . = ALIGN(2);
> *(.infomem .infomem.*)
> } > infomem
> .infomemnobits :
> {
> . = ALIGN(2);
> *(.infomemnobits .infomemnobits.*)
> } > infomem
> .infoa :
> {
> . = ALIGN(2);
> *(.infoa .infoa.*)
> } > infoa
> .infob :
> {
> . = ALIGN(2);
> *(.infob .infob.*)
> } > infob
> .infoc :
> {
> . = ALIGN(2);
> *(.infoc .infoc.*)
> } > infoc
> .infod :
> {
> . = ALIGN(2);
> *(.infod .infod.*)
> } > infod
> /* Values placed in the first 32 entries of a 64-entry interrupt vector
> * table. This exists because the FRAM chips place the BSL and JTAG
> * passwords at specific offsets that technically fall within the
> * interrupt table, but for which no MCU has a corresponding interrupt.
> * */
> PROVIDE(__vte_0 = 0xffff);
> PROVIDE(__vte_1 = 0xffff);
> PROVIDE(__vte_2 = 0xffff);
> PROVIDE(__vte_3 = 0xffff);
> PROVIDE(__vte_4 = 0xffff);
> PROVIDE(__vte_5 = 0xffff);
> PROVIDE(__vte_6 = 0xffff);
> PROVIDE(__vte_7 = 0xffff);
> PROVIDE(__vte_8 = 0xffff);
> PROVIDE(__vte_9 = 0xffff);
> PROVIDE(__vte_10 = 0xffff);
> PROVIDE(__vte_11 = 0xffff);
> PROVIDE(__vte_12 = 0xffff);
> PROVIDE(__vte_13 = 0xffff);
> PROVIDE(__vte_14 = 0xffff);
> PROVIDE(__vte_15 = 0xffff);
> PROVIDE(__vte_16 = 0xffff);
> PROVIDE(__vte_17 = 0xffff);
> PROVIDE(__vte_18 = 0xffff);
> PROVIDE(__vte_19 = 0xffff);
> PROVIDE(__vte_20 = 0xffff);
> PROVIDE(__vte_21 = 0xffff);
> PROVIDE(__vte_22 = 0xffff);
> PROVIDE(__vte_23 = 0xffff);
> PROVIDE(__vte_24 = 0xffff);
> PROVIDE(__vte_25 = 0xffff);
> PROVIDE(__vte_26 = 0xffff);
> PROVIDE(__vte_27 = 0xffff);
> PROVIDE(__vte_28 = 0xffff);
> PROVIDE(__vte_29 = 0xffff);
> PROVIDE(__vte_30 = 0xffff);
> PROVIDE(__vte_31 = 0xffff);
> .vectors :
> {
> __vectors_start = .;
> KEEP(*(.vectors*))
> _vectors_end = .;
> } > vectors
> /* Legacy section, prefer .far.text */
> .fartext :
> {
> . = ALIGN(2);
> *(.fartext .fartext.*)
> } > REGION_FAR_TEXT
> .far.text :
> {
> . = ALIGN(2);
> *(.far.text .far.text.*)
> } > REGION_FAR_TEXT
> .far.rodata :
> {
> . = ALIGN(2);
> *(.far.rodata .far.rodata.*)
> } > REGION_FAR_TEXT
> . = ALIGN(2);
> _efartext = .; /* Past last read-only (loadable) segment */
> .far.data :
> {
> . = ALIGN(2);
> __far_data_start = .;
> *(.far.data .far.data.*)
> . = ALIGN(2);
> _efardata = .; /* Past last read-write (loadable) segment */
> } > REGION_FAR_DATA AT > REGION_FAR_TEXT
> __far_data_load_start = LOADADDR(.far.data);
> __far_data_size = SIZEOF(.far.data);
> .far.bss :
> {
> . = ALIGN(2);
> __far_bss_start = .;
> *(.far.bss .far.bss.*)
> . = ALIGN(2);
> __far_bss_end = .;
> } > REGION_FAR_DATA
> __far_bss_size = SIZEOF(.far.bss);
> . = ALIGN(2);
> _far_end = .; /* Past last write (loadable) segment */
> /* Stabs for profiling information*/
> .profiler 0 : { *(.profiler) }
> /* Stabs debugging sections. */
> .stab 0 : { *(.stab) }
> .stabstr 0 : { *(.stabstr) }
> .stab.excl 0 : { *(.stab.excl) }
> .stab.exclstr 0 : { *(.stab.exclstr) }
> .stab.index 0 : { *(.stab.index) }
> .stab.indexstr 0 : { *(.stab.indexstr) }
> .comment 0 : { *(.comment) }
> /* DWARF debug sections.
> Symbols in the DWARF debugging sections are relative to the beginning
> of the section so we begin them at 0. */
> /* DWARF 1 */
> .debug 0 : { *(.debug) }
> .line 0 : { *(.line) }
> /* GNU DWARF 1 extensions */
> .debug_srcinfo 0 : { *(.debug_srcinfo) }
> .debug_sfnames 0 : { *(.debug_sfnames) }
> /* DWARF 1.1 and DWARF 2 */
> .debug_aranges 0 : { *(.debug_aranges) }
> .debug_pubnames 0 : { *(.debug_pubnames) }
> /* DWARF 2 */
> .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
> .debug_abbrev 0 : { *(.debug_abbrev) }
> .debug_line 0 : { *(.debug_line) }
> .debug_frame 0 : { *(.debug_frame) }
> .debug_str 0 : { *(.debug_str) }
> .debug_loc 0 : { *(.debug_loc) }
> .debug_macinfo 0 : { *(.debug_macinfo) }
> /* DWARF 3 */
> .debug_pubtypes 0 : { *(.debug_pubtypes) }
> .debug_ranges 0 : { *(.debug_ranges) }
> /* __stack is the only symbol that the user can override */
> PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram));
> __data_start_rom = _etext;
> __data_end_rom = _etext + SIZEOF (.data);
> }
>
>
>
>
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