5700 and 5701 will not return correct SRAM data when the chip is in
D3hot power state. tg3_get_eeprom_hw_cfg() must first put the device
in D0 before reading SRAM.
Thanks to Thomas Chenault at Dell for noticing this problem.
Signed-off-by: Michael Chan <[EMAIL PROTECTED]>
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 6bf8e04..1fc4380 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9436,12 +9436,18 @@ static inline struct subsys_tbl_ent *loo
return NULL;
}
-/* Since this function may be called in D3-hot power state during
- * tg3_init_one(), only config cycles are allowed.
- */
static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
{
u32 val;
+ u16 pmcsr;
+
+ /* On some early chips the SRAM cannot be accessed in D3hot state,
+ * so need make sure we're in D0.
+ */
+ pci_read_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, &pmcsr);
+ pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+ pci_write_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, pmcsr);
+ msleep(1);
/* Make sure register accesses (indirect or otherwise)
* will function correctly.
-
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at http://vger.kernel.org/majordomo-info.html
