On Sun, 2006-04-30 at 23:07 -0700, David S. Miller wrote:
> From: "Michael Chan" <[EMAIL PROTECTED]>
> Date: Sun, 30 Apr 2006 22:05:40 -0700
> 
> > Reading back the data register is a safe thing to do. This
> > guarantees that the data is written before we change the address
> > register to the zero value. Without the read, there is a danger of
> > the value being written to SRAM address 0 instead of the desired
> > address.
> 
> Writes can be posted, but they cannot be reordered can they?
> 

Right, reordering is not allowed unless the relaxed ordering attribute
is set. The read back here is not to guarantee ordering. Those SRAM
address and data registers require "set-up" times for the SRAM writes
and reads to work correctly. The "set-up" times are met either with
config. cycles or with a read when using MMIO cycles. No udelays are
needed, just a read will do.

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