On Tue, Aug 16, 2016 at 10:03 PM, Nicolas Ferre <nicolas.fe...@atmel.com> wrote:
> Le 15/08/2016 à 21:44, Shubhrajyoti Datta a écrit :
>> Some of the platforms like zynqmp ultrascale+ has a
>> separate clock gate for the rx clock. Add an optional
>> rx_clk so that the clock can be enabled.
>>
>> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.da...@xilinx.com>
>
> Fine with me:
> Acked-by: Nicolas Ferre <nicolas.fe...@atmel.com>
>
Thanks Nicolas.

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