On Fri, Nov 04, 2016 at 03:23:25AM +0100, Vivien Didelot wrote: > The Marvell chips have one internal SMI device per port, containing a > set of registers used to configure a port's link, STP state, default > VLAN or addresses database, etc.
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
