From: Yuval Mintz <yuval.mi...@cavium.com>
Date: Thu, 6 Apr 2017 15:58:27 +0300
> Patches #1 and #2 revolve around register access performed by driver;
> The first merely adds some debug, while the second does some fixing
> of incorrect PTT usage as well as preventing issues similar to those
> fixed by 6f437d431930 ("qed: Don't use attention PTT for configuring BW").
>
> Patch #3 better configures HW for architecture where cacheline isn't 64B.
>
> Patches #4-#8 all affect iSCSI related functionaility -
> adding statistics information [both to driver & management firmware],
> passing information on number of resources to qedi, and simplifying
> the Out-of-order implementation in SW.
Series applied, thanks Yuval.
