From: Grygorii Strashko <grygorii.stras...@ti.com> Date: Mon, 8 May 2017 14:21:21 -0500
> When users set flow control using ethtool the bits are set properly in the > CPGMAC_SL MACCONTROL register, but the FIFO depth in the respective Port n > Maximum FIFO Blocks (Pn_MAX_BLKS) registers remains set to the minimum size > reset value. When receive flow control is enabled on a port, the port's > associated FIFO block allocation must be adjusted. The port RX allocation > must increase to accommodate the flow control runout. The TRM recommends > numbers of 5 or 6. > > Hence, apply required Port FIFO configuration to > Pn_MAX_BLKS.Pn_TX_MAX_BLKS=0xF and Pn_MAX_BLKS.Pn_RX_MAX_BLKS=0x5 during > interface initialization. > > Cc: Schuyler Patton <spat...@ti.com> > Signed-off-by: Grygorii Strashko <grygorii.stras...@ti.com> Applied.
