Sure, PCI busses are little-endian. But is readX()/writeX() for PCI
only? I sure hope not.
It's defined for PCI and possibly ISA memory. You can use it for other
things if you whish to, but "other things" are arch specific in any
case.
Huh? You're saying that only PCI and ISA are standardised busses?
It would make a lot more sense if readX()/writeX() used the
endianness
of the bus they are performed on.
No way ! Again, it's evil if such a simple thing start doing different
things depending on random external factors.
That's your opinion, yes.
I'm saying it's *not* doing different things: in both cases it just does
the correct-endian access. Also it doesn't depend on "random external
factors" -- they're not random factors, and not external either: it only
depends on the bus the access is done on.
Different bus -> different accessor.
Then please rename readX()/writeX() to pci_readX()/pci_writeX().
Now you can say, use readl_be() or something similar, but that's a)
ugly,
b) error-prone, c) exponential interface explosion, d) ugly.
I'd rather has an interface explosion than having black endian magic
happening inside of the accessors.
Any comments on a), b) and d) as well?
Segher
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