On Wed, 30 May 2018 00:18:39 -0700, Michael Chan wrote: > On Tue, May 29, 2018 at 11:33 PM, Jakub Kicinski wrote: > > At some points you (Broadcom) were working whole bunch of devlink > > configuration options for the PCIe side of the ASIC. The number of > > queues relates to things like number of allocated MSI-X vectors, which > > if memory serves me was in your devlink patch set. In an ideal world > > we would try to keep all those in one place :) > > Yeah, another colleague is now working with Mellanox on something similar. > > One difference between those devlink parameters and these queue > parameters is that the former are more permanent and global settings. > For example, number of VFs or number of MSIX per VF are persistent > settings once they are set and after PCIe reset. On the other hand, > these queue settings are pure run-time settings and may be unique for > each VF. These are not stored as there is no room in NVRAM to store > 128 sets or more of these parameters.
Indeed, I think the API must be flexible as to what is persistent and what is not because HW will certainly differ in that regard. And agreed, queues may be a bit of a stretch here, but worth a try. > Anyway, let me discuss this with my colleague to see if there is a > natural fit for these queue parameters in the devlink infrastructure > that they are working on. Thank you!
