Matthew Garrett <[EMAIL PROTECTED]> writes: > > PCI seems to require a delay of 10ms when sequencing from D3 to D0, > which probably isn't acceptable latency for an "up" state.
It might be if the interface has been idle for some time (and the delay is not busy looping of course) How idle should be user configurable. But the idle detection needed for that should be probably higher up stack or at least some common library functions. -Andi - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
