Chris Snook <[EMAIL PROTECTED]> wrote: > > Some architectures currently do not declare the contents of an atomic_t to be > volatile. This causes confusion since atomic_read() might not actually read > anything if an optimizing compiler re-uses a value stored in a register, which > can break code that loops until something external changes the value of an > atomic_t. Avoiding such bugs requires using barrier(), which causes re-loads
Such loops should always use something like cpu_relax() which comes with a barrier. > of all registers used in the loop, thus hurting performance instead of helping > it, particularly on architectures where it's unnecessary. Since we generally Do you have an example of such a loop where performance is hurt by this? The IPVS code that led to this patch was simply broken and has been fixed to use cpu_relax(). Cheers, -- Visit Openswan at http://www.openswan.org/ Email: Herbert Xu ~{PmV>HI~} <[EMAIL PROTECTED]> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
