On Fri, Sep 18, 2015 at 09:27:11AM +0200, Geert Uytterhoeven wrote:
> On Fri, Sep 18, 2015 at 8:03 AM, Simon Horman
> <horms+rene...@verge.net.au> wrote:
> > From: Kazuya Mizuguchi <kazuya.mizuguchi...@renesas.com>
> >
> > This patch updates the ravb binding to support the r8a7795 SoC by:
> > - Adding a compat string for the new hardware
> > - Adding 25 named interrupts to binding for the new SoC;
> >   older SoCs continue to use a single multiplexed interrupt
> >
> > The example is also updated to reflect the r8a7795 as this is the
> > more complex case.
> >
> > Based on work by Kazuya Mizuguchi and others.
> >
> > Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
> 
> Acked-by: Geert Uytterhoeven <geert+rene...@glider.be>
> 
> Modulo the minor nit below...
> 
> > --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
> > +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
> 
> > @@ -18,6 +22,12 @@ Required properties:
> >  Optional properties:
> >  - interrupt-parent: the phandle for the interrupt controller that services
> >                     interrupts for this device.
> > +- interrupt-names: A list of interrupt names.
> > +                  For the R8A7795 SoC this property is mandatory;
> > +                  it should include one entry per channel, named "ch%u",
> > +                  where %u is the channel number ranging from 0 to 24.
> > +                  For other SoCs this property is optional; if present
> > +                  is should contain "mux" for a single muxed interrupt.
> 
> it

Thanks, I will fix that.
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