On Tuesday 09 Nov 2004 5:31 pm, RafaÅ Kamraj wrote: > Manaxus wrote:
> > $(CC) âI$(INCLUDE) $(CFLAGS) âc main.c > %.o : %.c > $(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@ That's why you're getting the bad separator error; it's looking for the colon (:). The format of a makefile is basically a list of these: target: dependencies commands more commands The leading whitespace before the commands is important, otherwise make doesn't know where one set of commands ends and the next set begins. The simplest makefile looks like this: program: program.c program.h gcc -o program program.c The first line there promises make that the following commands will take the files "program.c" and "program.h" and will produce the file "program". It also promises that only "program.c" and "program.h" are necessary to build "program", so make knows that it only has to execute those commands if either "program.c" or "program.h" has changed. All the rest is syntactic sugar to either allow compilation on multiple platforms or reduce the amount of typing you have to do. A trick many makefiles use is a target that never exists, so the commands it contains are always run. You will often find things like: clean: rm *.o which deletes all object files if you type "make clean". The standard "make install" is implemented the same way. When you invoke make with no arguments then it builds the first target in the file. That is the purpose of the otherwise pointless line: > > all: myapp The file "all" does not exist, so make tries to build it. No commands are given, but make knows that it has to have the file "myapp" first. So the effect is just to build "myapp". It avoids having to place the default target first in the file, which you may not want to do for reasons of your own. The "myapp" should match another target further down, as in: all: myapp . . . myapp: myapp.c myapp.h gcc -o myapp myapp.c . . . -- Richard Urwin
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