Hi,
I just realized that in order to be able to write to memory addresses above
0x100000 linear (1 Mb), even in protected mode, the A20 line has to be
enabled. However, greppig through the current NILO source tree for 'A20',
'8042' (the chip that controls this line) and '0x64' (the I/O port of said
chip) gave no relevant results, so I assume that the A20 was never enabled
by the current NILO source. If that is true, then that could be the problem.
Some background:
The A20 line was introduced by, I believe, Intel engineers, to be able to
run programs written for the 8086/8088 which relied on the address
wraparound feature of these processors, on the 80286 and higher.
The problem with the 286+ was that, contrary to the 8086, 0xFFFF:FFFF mapped
to 0x10FFEF linear, instead of 0xFFEF, which it did on the 8086. This was
solved by using a previously unused switch on the 8042 (yes, the keyboard
controller) to mask the A20 line (make it low). Thus, whether in real- or
protected mode, with the A20 switch on the 8042 set to 'off', it is
impossible for the CPU to successfully address memory addresses where the
A20 line should be set to 1.
This actually fits the scenario Rob encountered: spontaneous crashes, memory
corruption; all the signs he's writing into the wrong memory addresses. But,
as I think we can safely assume he's not, the only reason for this can be
the A20 switch.
For example code, look at arch/i386/boot/setup.S in any Linux source tree,
starting at around line 550.
Hope this helps,
Wouter Coene
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