https://bugs.freedesktop.org/show_bug.cgi?id=67382
--- Comment #34 from Emil Velikov <emil.l.veli...@gmail.com> ---
Here is a bit more information as to the blob's handing on the case
nv50
Simple register bashing
write(loadval | 0x0100000)
udelay(140s)
read()
write(0)
nv94/96
HWSQ
00000000: 5f 01 00 ewait #CRTC0_VBLANK 0x0
00000003: 5f 01 01 ewait #CRTC0_VBLANK 0x1
00000006: 0e wait 0x2 shl 0x6
00000007: 0d wait 0x1 shl 0x6
00000008: 02 wait 0x2 shl 0x0
00000009: 01 wait 0x1 shl 0x0
// the above are only valid if the output is already enabled
0000000a: e2 08 02 10 00 data 0x100208
0000000f: e0 0c a8 61 00 addr 0x61a80c
00000014: 00 nop
00000015: 40 0c a8 addrlo 0xa80c
00000018: 05 wait 0x1 shl 0x2
00000019: e2 00 00 00 00 data 0x0
0000001e: 40 0c a8 addrlo 0xa80c
00000021: 7f exit
00000022: 7f exit
00000023: 7f exit
PBUS.HWSQ.TRIGGER <= { TYPE = START | ENTRY_POINT = 0 }
PBUS.HWSQ.STATUS => { A = { IP = 0x5 | ACTIVE } }
if output is connected ~5,4 ms later
PDISPLAY.DAC[0x1].LOAD_CTRL => { LOAD_PATTERN = 0 | PRESENT = 0x7 }
PDISPLAY.DAC[0x1].LOAD_CTRL <= { LOAD_PATTERN = 0 | PRESENT = 0 }
otherwise in ~5us
PDISPLAY.DAC[0x1].LOAD_CTRL => { LOAD_PATTERN = 0 | PRESENT = 0x0 }
PDISPLAY.DAC[0x1].LOAD_CTRL <= { LOAD_PATTERN = 0 | PRESENT = 0 }
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