On Wed, Mar 26, 2014 at 1:22 PM, Ben Skeggs <skeg...@gmail.com> wrote: > On Mon, Mar 24, 2014 at 6:42 PM, Alexandre Courbot <acour...@nvidia.com> > wrote: >> Pad the microcode to a multiple of 0x40, otherwise firmware will fail to >> run from non-prepadded firmware files. >> >> Signed-off-by: Alexandre Courbot <acour...@nvidia.com> >> --- >> drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> index f997a18f5760..367e72daf8b1 100644 >> --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c >> @@ -768,6 +768,10 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 >> fuc_base, >> nv_wr32(priv, fuc_base + 0x0188, i >> 6); >> nv_wr32(priv, fuc_base + 0x0184, code->data[i]); >> } >> + >> + /* code must be padded to 0x40 */ >> + for (; i < (((code->size / 4) + 0x3f) & ~0x3f); i++) > "for (; i & 0x3f; i++)" would work just as well :)
Indeed. >_< _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
