This hook can be removed if the function writing the HS descriptor is aware of WPR settings. Let's do that as it allows us to make the ACR descriptor structure private and save some code.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com> --- drm/nouveau/nvkm/subdev/secboot/acr_v1.c | 106 +++++++++++++++++-------- drm/nouveau/nvkm/subdev/secboot/acr_v1.h | 45 ----------- drm/nouveau/nvkm/subdev/secboot/acr_v1_gm20b.c | 11 --- 3 files changed, 75 insertions(+), 87 deletions(-) diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_v1.c b/drm/nouveau/nvkm/subdev/secboot/acr_v1.c index d7405f8f7c63..db0fb3338398 100644 --- a/drm/nouveau/nvkm/subdev/secboot/acr_v1.c +++ b/drm/nouveau/nvkm/subdev/secboot/acr_v1.c @@ -298,6 +298,49 @@ struct hsf_load_header { } app[0]; }; +/** + * struct hsflcn_acr_desc - data section of the HS firmware + * + * This header is to be copied at the beginning of DMEM by the HS bootloader. + * + * @signature: signature of ACR ucode + * @wpr_region_id: region ID holding the WPR header and its details + * @wpr_offset: offset from the WPR region holding the wpr header + * @regions: region descriptors + * @nonwpr_ucode_blob_size: size of LS blob + * @nonwpr_ucode_blob_start: FB location of LS blob is + */ +struct hsflcn_acr_desc { + union { + u8 reserved_dmem[0x200]; + u32 signatures[4]; + } ucode_reserved_space; + u32 wpr_region_id; + u32 wpr_offset; + u32 mmu_mem_range; +#define FLCN_ACR_MAX_REGIONS 2 + struct { + u32 no_regions; + struct { + u32 start_addr; + u32 end_addr; + u32 region_id; + u32 read_mask; + u32 write_mask; + u32 client_mask; + } region_props[FLCN_ACR_MAX_REGIONS]; + } regions; + u32 ucode_blob_size; + u64 ucode_blob_base __aligned(8); + struct { + u32 vpr_enabled; + u32 vpr_start; + u32 vpr_end; + u32 hdcp_policies; + } vpr_desc; +}; + + static inline u64 flcn64_to_u64(const struct flcn_u64 f) { return ((u64)f.hi) << 32 | f.lo; @@ -879,6 +922,31 @@ acr_v1_populate_hsf_bl_desc(void *acr_image, struct acr_v1_bl_desc *bl_desc) bl_desc->data_size = load_hdr->data_size; } +static void +acr_v1_fixup_hs_desc(struct nvkm_acr_v1 *acr, struct nvkm_secboot *sb, + struct hsflcn_acr_desc *desc) +{ + struct nvkm_gpuobj *ls_blob = acr->ls_blob; + + desc->ucode_blob_base = acr->ls_blob->addr; + desc->ucode_blob_size = acr->ls_blob->size; + + desc->wpr_offset = 0; + + /* + * WPR region information for the HS binary to set up, if WPR is not + * fixed + */ + if (sb->wpr_size == 0) { + desc->wpr_region_id = 1; + desc->regions.no_regions = 1; + desc->regions.region_props[0].region_id = 1; + desc->regions.region_props[0].start_addr = ls_blob->addr >> 8; + desc->regions.region_props[0].end_addr = + (ls_blob->addr + ls_blob->size) >> 8; + } +} + /** * acr_v1_prepare_hs_blob - load and prepare a HS blob and BL descriptor * @@ -889,9 +957,9 @@ acr_v1_populate_hsf_bl_desc(void *acr_image, struct acr_v1_bl_desc *bl_desc) * @patch whether we should patch the HS descriptor (only for HS loaders) */ static int -acr_v1_prepare_hs_blob(struct nvkm_acr_v1 *acr, const char *fw, - struct nvkm_gpuobj **blob, - struct acr_v1_bl_desc *bl_desc, bool patch) +acr_v1_prepare_hs_blob(struct nvkm_acr_v1 *acr, struct nvkm_secboot *sb, + const char *fw, struct nvkm_gpuobj **blob, + struct acr_v1_bl_desc *bl_desc, bool patch) { const struct nvkm_subdev *subdev = acr->base.subdev; void *acr_image; @@ -909,7 +977,7 @@ acr_v1_prepare_hs_blob(struct nvkm_acr_v1 *acr, const char *fw, acr_data = acr_image + hsbin_hdr->data_offset; - /* Patch descriptor? */ + /* Patch descriptor with WPR information? */ if (patch) { struct hsf_fw_header *fw_hdr; struct hsf_load_header *load_hdr; @@ -918,7 +986,7 @@ acr_v1_prepare_hs_blob(struct nvkm_acr_v1 *acr, const char *fw, fw_hdr = acr_image + hsbin_hdr->header_offset; load_hdr = acr_image + fw_hdr->hdr_offset; desc = acr_data + load_hdr->data_dma_base; - acr->func->fixup_hs_desc(acr, desc); + acr_v1_fixup_hs_desc(acr, sb, desc); } /* Generate HS BL descriptor */ @@ -990,14 +1058,14 @@ acr_v1_load_blobs(struct nvkm_acr_v1 *acr, struct nvkm_secboot *sb) return ret; /* Load the HS firmware that will load the LS firmwares */ - ret = acr_v1_prepare_hs_blob(acr, "acr/ucode_load", &acr->load_blob, + ret = acr_v1_prepare_hs_blob(acr, sb, "acr/ucode_load", &acr->load_blob, &acr->load_bl_desc, true); if (ret) return ret; /* If the ACR region is dynamically programmed, we need an unload FW */ if (sb->wpr_size == 0) { - ret = acr_v1_prepare_hs_blob(acr, "acr/ucode_unload", + ret = acr_v1_prepare_hs_blob(acr, sb, "acr/ucode_unload", &acr->unload_blob, &acr->unload_bl_desc, false); if (ret) @@ -1084,29 +1152,6 @@ acr_v1_generate_bl_desc(const struct acr_v1_bl_desc *desc, void *ret) memcpy(ret, desc, sizeof(*desc)); } -static void -acr_v1_fixup_hs_desc(struct nvkm_acr_v1 *acr, - struct hsflcn_acr_desc *desc) -{ - struct nvkm_gpuobj *ls_blob = acr->ls_blob; - - desc->ucode_blob_base = acr->ls_blob->addr; - desc->ucode_blob_size = acr->ls_blob->size; - - desc->wpr_offset = 0; - - /* - * WPR region information for the HS binary to set up, if WPR is not - * fixed - */ - desc->wpr_region_id = 1; - desc->regions.no_regions = 1; - desc->regions.region_props[0].region_id = 1; - desc->regions.region_props[0].start_addr = ls_blob->addr >> 8; - desc->regions.region_props[0].end_addr = - (ls_blob->addr + ls_blob->size) >> 8; -} - /* * acr_v1_reset() - execute secure boot from the prepared state * @@ -1218,7 +1263,6 @@ static const struct nvkm_acr_v1_func gm200_acr_v1_func = { .bl_desc_size = sizeof(struct acr_v1_bl_desc), .generate_bl_desc = acr_v1_generate_bl_desc, - .fixup_hs_desc = acr_v1_fixup_hs_desc, }; static const struct nvkm_acr_func diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_v1.h b/drm/nouveau/nvkm/subdev/secboot/acr_v1.h index de66da0cd3a6..ac1273ce92f4 100644 --- a/drm/nouveau/nvkm/subdev/secboot/acr_v1.h +++ b/drm/nouveau/nvkm/subdev/secboot/acr_v1.h @@ -67,49 +67,6 @@ struct acr_v1_bl_desc { u32 data_size; }; -/** - * struct hsflcn_acr_desc - data section of the HS firmware - * - * This header is to be copied at the beginning of DMEM by the HS bootloader. - * - * @signature: signature of ACR ucode - * @wpr_region_id: region ID holding the WPR header and its details - * @wpr_offset: offset from the WPR region holding the wpr header - * @regions: region descriptors - * @nonwpr_ucode_blob_size: size of LS blob - * @nonwpr_ucode_blob_start: FB location of LS blob is - */ -struct hsflcn_acr_desc { - union { - u8 reserved_dmem[0x200]; - u32 signatures[4]; - } ucode_reserved_space; - u32 wpr_region_id; - u32 wpr_offset; - u32 mmu_mem_range; -#define FLCN_ACR_MAX_REGIONS 2 - struct { - u32 no_regions; - struct { - u32 start_addr; - u32 end_addr; - u32 region_id; - u32 read_mask; - u32 write_mask; - u32 client_mask; - } region_props[FLCN_ACR_MAX_REGIONS]; - } regions; - u32 ucode_blob_size; - u64 ucode_blob_base __aligned(8); - struct { - u32 vpr_enabled; - u32 vpr_start; - u32 vpr_end; - u32 hdcp_policies; - } vpr_desc; -}; - -struct nvkm_acr_v1; /** * struct nvkm_acr_v1_func - manages nuances between ACR v1 instances @@ -117,12 +74,10 @@ struct nvkm_acr_v1; * @bl_desc_size: size of the bootloader descriptor * @generate_bl_desc: function called on a block of bl_desc_size to generate the * proper bootloader descriptor - * @fixup_hs_desc: function called to fixup the HS descriptor */ struct nvkm_acr_v1_func { u32 bl_desc_size; void (*generate_bl_desc)(const struct acr_v1_bl_desc *, void *); - void (*fixup_hs_desc)(struct nvkm_acr_v1 *, struct hsflcn_acr_desc *); }; /** diff --git a/drm/nouveau/nvkm/subdev/secboot/acr_v1_gm20b.c b/drm/nouveau/nvkm/subdev/secboot/acr_v1_gm20b.c index 4cfc175accdd..fcf644b9656c 100644 --- a/drm/nouveau/nvkm/subdev/secboot/acr_v1_gm20b.c +++ b/drm/nouveau/nvkm/subdev/secboot/acr_v1_gm20b.c @@ -73,21 +73,10 @@ gm20b_acr_v1_generate_bl_desc(const struct acr_v1_bl_desc *desc, void *ret) gdesc->data_size = desc->data_size; } -static void -gm20b_secboot_fixup_hs_desc(struct nvkm_acr_v1 *acr, - struct hsflcn_acr_desc *desc) -{ - desc->ucode_blob_base = acr->ls_blob->addr; - desc->ucode_blob_size = acr->ls_blob->size; - - desc->wpr_offset = 0; -} - static const struct nvkm_acr_v1_func gm20b_acr_v1_func = { .bl_desc_size = sizeof(struct acr_v1_gm20b_bl_desc), .generate_bl_desc = gm20b_acr_v1_generate_bl_desc, - .fixup_hs_desc = gm20b_secboot_fixup_hs_desc, }; static const struct nvkm_acr_func -- 2.10.0 _______________________________________________ Nouveau mailing list Nouveau@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/nouveau