Verma, Vishal L wrote:
> On Thu, 2022-07-14 at 10:02 -0700, Dan Williams wrote:
> > Exercise the fundamental region provisioning sysfs mechanisms of discovering
> > available DPA capacity, allocating DPA to a region, and programming HDM
> > decoders.
> >
> > Signed-off-by: Dan Williams <[email protected]>
> > ---
> > test/cxl-region-sysfs.sh | 122
> > ++++++++++++++++++++++++++++++++++++++++++++++
> > test/meson.build | 2 +
> > 2 files changed, 124 insertions(+)
> > create mode 100644 test/cxl-region-sysfs.sh
>
> Hi Dan,
>
> This is mostly looking good - just one note below found in testing:
>
> >
> > diff --git a/test/cxl-region-sysfs.sh b/test/cxl-region-sysfs.sh
> > new file mode 100644
> > index 000000000000..2582edb3f306
> > --- /dev/null
> > +++ b/test/cxl-region-sysfs.sh
> > @@ -0,0 +1,122 @@
> > +#!/bin/bash
> > +# SPDX-License-Identifier: GPL-2.0
> > +# Copyright (C) 2022 Intel Corporation. All rights reserved.
> > +
> > +. $(dirname $0)/common
> > +
> > +rc=1
> > +
> > +set -ex
> > +
> > +trap 'err $LINENO' ERR
> > +
> > +check_prereq "jq"
> > +
> > +modprobe -r cxl_test
> > +modprobe cxl_test
> > +udevadm settle
> > +
> > +# THEORY OF OPERATION: Create a x8 interleave across the pmem capacity
> > +# of the 8 endpoints defined by cxl_test, commit the decoders (which
> > +# just stubs out the actual hardware programming aspect, but updates the
> > +# driver state), and then tear it all down again. As with other cxl_test
> > +# tests if the CXL topology in tools/testing/cxl/test/cxl.c ever changes
> > +# then the paired update must be made to this test.
> > +
> > +# find the root decoder that spans both test host-bridges and support pmem
> > +decoder=$($CXL list -b cxl_test -D -d root | jq -r ".[] |
> > + select(.pmem_capable == true) |
> > + select(.nr_targets == 2) |
> > + .decoder")
> > +
> > +# find the memdevs mapped by that decoder
> > +readarray -t mem < <($CXL list -M -d $decoder | jq -r ".[].memdev")
> > +
> > +# ask cxl reserve-dpa to allocate pmem capacity from each of those memdevs
> > +readarray -t endpoint < <($CXL reserve-dpa -t pmem ${mem[*]} -s
> > $((256<<20)) |
> > + jq -r ".[] | .decoder.decoder")
> > +
> > +# instantiate an empty region
> > +region=$(cat /sys/bus/cxl/devices/$decoder/create_pmem_region)
> > +echo $region > /sys/bus/cxl/devices/$decoder/create_pmem_region
> > +uuidgen > /sys/bus/cxl/devices/$region/uuid
> > +
> > +# setup interleave geometry
> > +nr_targets=${#endpoint[@]}
> > +echo $nr_targets > /sys/bus/cxl/devices/$region/interleave_ways
> > +g=$(cat /sys/bus/cxl/devices/$decoder/interleave_granularity)
> > +echo $g > /sys/bus/cxl/devices/$region/interleave_granularity
> > +echo $((nr_targets * (256<<20))) > /sys/bus/cxl/devices/$region/size
> > +
> > +# grab the list of memdevs grouped by host-bridge interleave position
> > +port_dev0=$($CXL list -T -d $decoder | jq -r ".[] |
> > + .targets | .[] | select(.position == 0) | .target")
> > +port_dev1=$($CXL list -T -d $decoder | jq -r ".[] |
> > + .targets | .[] | select(.position == 1) | .target")
>
> With my pending update to make memdevs and regions the default listing
> if no other top level object specified, the above listing breaks as it
> can't deal with the extra memdevs now listed.
>
> I think it may make sense to fine tune the defaults a bit - i.e. if
> a -d is supplied, assume -D, but no other default top-level objects.
Yes, this is what I would expect.
> However I think this would be more resilient regardless, if it
> explicitly specified a -D:
True, but it's a bit redundant.
Why does the -RM default break:
cxl list [-T] -d $decoder
...? Doesn't the final "num_list_flags() == 0" check come after:
if (param.decoder_filter)
param.decoders = true;
...has prevented the default?
