Robert Richter wrote:
> On 28.11.22 13:58:55, Dan Williams wrote:
> > @@ -335,15 +336,22 @@ resource_size_t cxl_rcrb_to_component(struct device
> > *dev,
> > return CXL_RESOURCE_NONE;
> > }
> >
> > + id = readl(addr + PCI_VENDOR_ID);
> > cmd = readw(addr + PCI_COMMAND);
> > bar0 = readl(addr + PCI_BASE_ADDRESS_0);
> > bar1 = readl(addr + PCI_BASE_ADDRESS_1);
> > iounmap(addr);
> > release_mem_region(rcrb, SZ_4K);
> >
> > - /* sanity check */
> > - if (cmd == 0xffff)
> > + /*
> > + * Sanity check, see CXL 3.0 Figure 9-8 CXL Device that Does Not
> > + * Remap Upstream Port and Component Registers
> > + */
> > + if (id == (u32) -1) {
>
> U32_MAX? Or, cheating there: ((u32)~0U).
>
U32_MAX looks good to me.
