> Can anybody give a definite answer if the CQ trigger has edge or level
semantics, and what I need to do to assure CQ entries are always
processed without a delay? The docs for ib_rearm_cq seem to say
something different than the docs for ib_rearm_n_cq, so the docs aren't
much help either.

 

The semantics can vary based on HCA model.  In general the safe
algorithm is:

poll CQ until empty

rearm CQ

poll CQ until empty

 

The Mellanox HCA's rearm CQ will generate CQ interrupts for any still
remaining on the CQ (hence not requiring the 2nd poll loop).  However
the IBTA spec does not require this behavior, so other HCAs may not
implement it.

 

Todd Rimmer

Chief Architect 

QLogic System Interconnect Group

Voice: 610-233-4852     Fax: 610-233-4777

[EMAIL PROTECTED] <mailto:[EMAIL PROTECTED]>   www.QLogic.com

 

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