Hi all (here).

No, we won't need more of this non-coming "help".

I made some progress with finding out how the essential offsets are handled, 
with data structures of so called cookies (no, Nuland and other 
mass-slaughterers and war-criminals are not invited).


Here only a quick grep:


i915/src/i915_dma.c:1184:static unsigned int i915_vga_set_decode(void *cookie, 
bool state)
i915/src/i915_dma.c:1186:       struct drm_device *dev = cookie;
i915/src/i915_gem_gtt.c:138:    ddi_dma_cookie_t cookie;
i915/src/i915_gem_gtt.c:139:    uint_t cookie_cnt;
i915/src/i915_gem_gtt.c:141:    uint32_t paddr, cookie_end;
i915/src/i915_gem_gtt.c:161:        DDI_DMA_DONTWAIT, NULL, &cookie, 
&cookie_cnt)
i915/src/i915_gem_gtt.c:177:            for (paddr = cookie.dmac_address,
i915/src/i915_gem_gtt.c:178:                cookie_end = cookie.dmac_address + 
cookie.dmac_size;
i915/src/i915_gem_gtt.c:179:                paddr < cookie_end;
i915/src/i915_gem_gtt.c:185:            if (i >= cookie_cnt)
i915/src/i915_gem_gtt.c:187:            ddi_dma_nextcookie(ppgtt->dma_hdl, 
&cookie);
i915/src/i915_gem.c:1110:       struct ddi_umem_cookie *umem_cookie = 
obj->base.maplist.map->umem_cookie;
i915/src/i915_gem.c:1121:       umem_cookie->cvaddr = obj->base.gtt_map_kaddr;
i915/src/i915_gem.c:2455: * This function walks the fence regs looking for a 
free one for @obj,
i915/src/i915_gem.c__ORIG:1109: struct ddi_umem_cookie *umem_cookie = 
obj->base.maplist.map->umem_cookie;
i915/src/i915_gem.c__ORIG:1120: umem_cookie->cvaddr = obj->base.gtt_map_kaddr;
i915/src/i915_gem.c__ORIG:2429: * This function walks the fence regs looking 
for a free one for @obj,
i915/src/i915_irq.c:2964:       /* We detect FlipDone by looking for the change 
in PendingFlip from '1'
i915/src/i915_irq.c:3139:       /* We detect FlipDone by looking for the change 
in PendingFlip from '1'
i915/src/intel_bios.c:55:       /* walk the sections looking for section_id */
i915/src/intel_bios.c:710:      /* Scour memory looking for the VBT signature */
i915/src/intel_dp.c:109: * Thus the strange-looking division by 10 in 
intel_dp_link_required, to
Binary file mdb/modules/i915.so matches
sys/drm/drm_sun_pci.h:53:       ddi_iblock_cookie_t intr_block;
sys/drm/drm_sunmod.h:109:static int drm_sun_devmap(dev_t, devmap_cookie_t,
sys/drm/drmP.h:551:     ddi_umem_cookie_t umem_cookie;   /**< For SAREA alloc 
and free */
sys/drm/drmP.h:585:     devmap_cookie_t dhp;
sys/drm/drmP.h:647:     struct gfxp_pmem_cookie mempool_cookie;
sys/drm/drmP.h:729:     ddi_dma_cookie_t cookie;
sys/drm/drmP.h:730:     uint_t cookie_num;
sys/drm/drmP.h:742:     ddi_umem_cookie_t *umem_cookie;
sys/drm/drmP.h:1076: * the interrupt priority. Interrupt cookie in drm_device



That's a key aspect of getting it to work.
And I noted that even on old snv_147 aka Illumos's gfx_private we do already 
have:

 nm /platform/i86xpv/kernel/misc/amd64/gfx_private|grep ookie
00000000000009c0 T gfxp_umem_cookie_destroy
0000000000000970 T gfxp_umem_cookie_init


So, at least once step ahead.



%martin



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