Viktor wrote: > considering that the 4 RAM chips prefer long data streams, which is > the exact opposite of heavily self-modifying nanocontroller code,
Perhaps I don't understand the nanocontroller concept, but why can't it execute its code out of a small static RAM (e.g., blockram in FPGA, or a small dedicated RAM block in an ASIC)? Then the access paterns to the actual video data can be very regular and well-suited to SDRAM characteristics. Eric _______________________________________________ Open-graphics mailing list [email protected] http://lists.duskglow.com/mailman/listinfo/open-graphics List service provided by Duskglow Consulting, LLC (www.duskglow.com)
