howard parkin wrote:
There seems to be some misunderstanding here. The SPI PROM that is
connected to the small FPGA is programmed with boot code (VGA boot
or Unix Console code). It does not hold the FPGA configuration.
The FPGA configuration EEPROM for the small FPGA is contained
in the FPGA itself. This integrated EEPROM can not be accessed
from the internals of the FPGA, but must be programmed via the
JTAG interface. Therefore it can not be tampered with by broken
software, because there is no way to get from PCI to internal
EEPROM.
I have been looking for info on the small FPGA to add to the OGD1 page -
I must have missed it somewhere, but what is the name of this chip? Any
link to a datasheet?
jb
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