On 8/25/06, Jon Smirl <[EMAIL PROTECTED]> wrote:
On 8/25/06, Timothy Miller <[EMAIL PROTECTED]> wrote:
> On 8/25/06, Jon Smirl <[EMAIL PROTECTED]> wrote:
> > What does the OGH address space look like?
>
> The way we've spec'd it is this:
>
> The drawing engine doesn't have access to host memory, but our DMA
> engine does.
Can the drawing engine copy memory around in the full VRAM space? The
bitblt engine should be able to do this.
Yeah. And I hope I don't forget this, but I want two kinds of copy.
One is a rectangular bitblt. The other is more of a linear memory
move. Don't let me forget to add the latter. :)
A related point, dual headed cards appear as two PCI devices. They can
set their BAR's independently.
That's because they're using two separate GPU chips... at least in
Matrox's case. We're only a single PCI device. Software is
responsible for allocating framebuffers. There are then lots of
options available, such as independent displays and side-by-side
continuous displays that act as one across two monitors.
In this design the DMA engine is much more important since there is no
GART mapping hardware. Note that the ATI PCI based cards still have
GART support even though they don't support AGP.
I don't know enough about GART. But what I am familiar with is where
the host chipset does remapping, so the GPU is given a "physical
address", which gets remapped by the chipset to real host RAM. We
just use whatever physical address we're given.
> If you want to use a drawing surface as a texture or bitblt source or
> a drawing target, it must be located in graphics memory.
For discrete cards this is true. For IGP devices everything is in system RAM.
Ours is not IGP.
> In this generation, we will not be providing a way for the GPU to use
> textures directly out of host memory. Every objection will be met
> with "we can add more graphics memory."
Current cards will sometimes run their command streams out of system
memory. The only way they run textures out of system memory is through
GART mappings or IGP.
Well, we certainly want to use DMA to execute command streams from
main memory. You can use DMA commands then to copy data into the
graphics memory.
Current drivers have three levels of memory: VRAM, GART, system. In
this design there is only VRAM and system. IGP devices only have
system, etc.
Gotcha. I'm learning a few things from this.
The current drivers definitely use GART for texture access. The
limitation is that GART memory can't be used for a rendering buffer.
I've actually gotten a Radeon to render to host memory. Probably
incredibly slow, but it worked.
XGL and X Composite put a lot of memory pressure on VRAM. Each open
app gets a render buffer. This is very different than games which only
have a few render buffers and lots of textures.
Many have said that 256MiB is enough for this. If not, we can alter
that before we ship OGC boards.
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