Moin,
I finaly had time to finish my check up of bochs.
Unfortunately, the result is that we may not be
able to use bochs for a system level simulation
including the operating system. Bochs uses a
too abstract model of the PCI bus (basicaly just
read and write of arbitrary size data), so that we
would need to rewrite quite some bit of bochs
to extract those signals (or add a huge layer
between bochs and our simulation). Synchronisation
of both would be a whole other issue, which i
didnt check.
Currently i suggest either to stick with a pure
functional verification in verilog and driver
development using OGD1 or to write a low level
PC simulator in a HDL.
I could start one in VHDL, but with that we
would have difficulties to interface it with
verilog (or does someone have a OSS simulator
capable of doing vhdl/verilog co-simulation?).
Or someone could start one writing in verilog
while i learn verilog myself. Well.. actually
it doesn't really matter as the work in writting
a full blown PC simulator, even a simplified
one is a lot more work than writing a graphics
card. Which in turn would make it more feasible
to rewrite bochs in a way to fit our needs.
Attila Kinali
--
egp ist vergleichbar mit einem ikea bausatz fuer flugzeugtraeger
-- reeler in +kaosu
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