James Richard Tyrer wrote:
Nicholas A. Sinnott-Armstrong wrote:
I understand that we can't just oversample more to reduce noise, but why
doesn't the noise-shaping trick of sigma-delta ADCs (integrator) work
here?
We can just use a wide BPF, or even use the aforementioned brick wall
filter
our ears have (if the frequency is high enough, which it should be
with 192Khz
audio).
Yes, a Sigma-Delta DAC does work and it is used by some commercially
available chips.
One small issue. A Sigma-Delta PCM to PWM converter is actually a
Digital to Analog converter that contains analog integrators. I presume
that high end audio equipment would try to have the full 138.5 dB
dynamic range.
Looking at the standard recursive Sigma-Delta:
http://home.earthlink.net/~tyrerj/files/OG/noise-shaping.pdf
It should be possible to realize the Quantizer digitally so that it was
an all digital system.
To directly implement a 3 level (actually pseudo-3-level), you take only
the two most significant and generate the following:
11 ffffff
10 800000
01 7fffff
00 000000
Then take that output to generate a signed 3 level signal (800000 &
7fffff are both considered to be 0) and then a PWM signal by multiplying by
1 + Z^(-1)
Then the question is how fast does the quantizer clock need to be to
produce satisfactory output. Probably too fast.
So, using a DLL delay line, we can produce slight variations in width of
the PWM pulses (less than one clock) which are translated from more
significant bits in the quantizer output. This would allow us to reduce
the quantizer clock frequency.
An advantage here is that you can accept 44.1KHz or N*48KHz signals
without bit rate conversion 44.1/48 = 147/160 so this can be
rationalized with a 7.056 MHz clock so the circuit can operate at
N*48KHz while the first adder accepts input at the sample frequency with
the clock phase locked to the input sample rate.
Then there is feedback.
There is a significant difference between the ideal waveform and that
actual output:
http://home.earthlink.net/~tyrerj/files/OG/pulse.png
This is what feedback on the digital part of the amp can try to correct.
The difference can be approximated by a finite turn on delay and then
a rise time. These can be corrected for with two separate feedback loops.
The inner loop would shift the turn on and off points so that they were
always delayed by the same amount. This is to correct for different
turn-on times in the output MOSFETs.
The outer loop would compare a delayed reference pulse with the output
pulse. This will produce two short pulses, one positive and one
negative which should match if the rise times are equal. This is to
correct for differences in rise time. The pulses can be filtered and if
there is a net DC component, the pulse width can be adjusted in the
analog domain.
Note in both cases that the loops to do not need to run at the carrier
frequency since they are correcting for parameters which don't change
much from pulse to pulse. There would be issues in using analog
circuits to modify the pulses, however they are inside of a feedback
loop which should correct for minor analog issues.
--
JRT
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