src/via_display.c | 57 ++++++++++++++++++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 21 deletions(-)
New commits: commit 99838aba5b21accf1d4f12efeca7e088b4ebe3c7 Author: Kevin Brace <kevinbr...@gmx.com> Date: Fri May 20 10:19:52 2016 -0700 Cleanup of the code that sets IGA1 horizontal total viaIGA1SetDisplayRegister function contains the code in question. This function is located inside via_display.c. Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_display.c b/src/via_display.c index a46bb61..f933ccc 100644 --- a/src/via_display.c +++ b/src/via_display.c @@ -436,12 +436,24 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode) /* Linear Mode */ ViaCrtcMask(hwp, 0x43, 0x00, 0x04); - /* Crtc registers */ - /* horizontal total : 4100 */ + + /* Set IGA1 horizontal total.*/ + /* Due to IGA1 horizontal total being only 9 bits wide, + * the adjusted horizontal total needs to be shifted by + * 3 bit positions to the right. + * In addition to that, this particular register requires the + * value to be 5 less than the actual value being written. */ + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "IGA1 CrtcHTotal: %d\n", mode->CrtcHTotal)); temp = (mode->CrtcHTotal >> 3) - 5; + + /* 3X5.00[7:0] - Horizontal Total Bits [7:0] */ hwp->writeCrtc(hwp, 0x00, temp & 0xFF); + + /* 3X5.36[3] - Horizontal Total Bit [8] */ ViaCrtcMask(hwp, 0x36, temp >> 5, 0x08); + /* horizontal address : 2048 */ temp = (mode->CrtcHDisplay >> 3) - 1; hwp->writeCrtc(hwp, 0x01, temp & 0xFF); commit 46ddaceb074794ed0fc67ad12cde827e49ec1354 Author: Kevin Brace <kevinbr...@gmx.com> Date: Fri May 20 00:08:16 2016 -0700 Cleanup of the code that sets IGA1 color depth viaIGA1SetDisplayRegister function contains the code in question. This function is located inside via_display.c. Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_display.c b/src/via_display.c index e179c8c..a46bb61 100644 --- a/src/via_display.c +++ b/src/via_display.c @@ -392,26 +392,29 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode) ViaSeqMask(hwp, 0x15, 0x02, 0x02); - /* bpp */ + /* Set the color depth for IGA1. */ switch (pScrn->bitsPerPixel) { - case 8: - /* Only CLE266.AX use 6bits LUT. */ - if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15) - ViaSeqMask(hwp, 0x15, 0x22, 0xFE); - else - ViaSeqMask(hwp, 0x15, 0xA2, 0xFE); - break; - case 16: - ViaSeqMask(hwp, 0x15, 0xB6, 0xFE); - break; - case 24: - case 32: - ViaSeqMask(hwp, 0x15, 0xAE, 0xFE); - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n", - pScrn->bitsPerPixel); - break; + case 8: + /* Only CLE266.AX use 6bits LUT. */ + if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15) { + ViaSeqMask(hwp, 0x15, 0x22, 0xFE); + } else { + ViaSeqMask(hwp, 0x15, 0xA2, 0xFE); + } + + break; + case 16: + ViaSeqMask(hwp, 0x15, 0xB6, 0xFE); + break; + case 24: + case 32: + ViaSeqMask(hwp, 0x15, 0xAE, 0xFE); + break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unsupported color depth: %d\n", + pScrn->bitsPerPixel); + break; } switch (pVia->Chipset) { _______________________________________________ Openchrome-devel mailing list Openchrome-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/openchrome-devel