configure.ac | 2 - src/via_display.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ src/via_ums.h | 1 3 files changed, 64 insertions(+), 1 deletion(-)
New commits: commit 2e2fb53e1c09d413174000116c4e08d8303a7626 Author: Kevin Brace <kevinbr...@gmx.com> Date: Mon May 23 00:06:27 2016 -0700 Version bumped to 0.4.154 Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/configure.ac b/configure.ac index 9916f6d..6f71949 100644 --- a/configure.ac +++ b/configure.ac @@ -23,7 +23,7 @@ # Initialize Autoconf AC_PREREQ(2.57) AC_INIT([xf86-video-openchrome], - [0.4.153], + [0.4.154], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome], [xf86-video-openchrome]) commit 3540e211691ab7676284117dc9dc3c71ed92900e Author: Kevin Brace <kevinbr...@gmx.com> Date: Mon May 23 00:04:46 2016 -0700 Added viaIGA2Init viaIGA2Init function initializes IGA2 specific registers. This function is located inside via_display.c. Signed-off-by: Kevin Brace <kevinbr...@gmx.com> diff --git a/src/via_display.c b/src/via_display.c index 803a991..aff642a 100644 --- a/src/via_display.c +++ b/src/via_display.c @@ -1491,6 +1491,67 @@ viaIGA1Restore(ScrnInfoPtr pScrn) "Exiting viaIGA1Restore.\n")); } +/* + * Initialize IGA2 (Integrated Graphics Accelerator) registers. + */ +void +viaIGA2Init(ScrnInfoPtr pScrn) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); +#ifdef HAVE_DEBUG + CARD8 temp; +#endif + + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Entered viaIGA2Init.\n")); + +#ifdef HAVE_DEBUG + temp = hwp->readSeq(hwp, 0x1B); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "SR1B: 0x%02X\n", temp)); + temp = hwp->readSeq(hwp, 0x2D); + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "SR2D: 0x%02X\n", temp)); +#endif + + /* 3C5.1B[7:6] - Secondary Display Engine (Gated Clock <LCK>) + * 0x: Clock always off + * 10: Clock always on + * 11: Clock on/off according to the + * Power Management Status (PMS) + * 3C5.1B[5:4] - Primary Display Engine (Gated Clock <VCK>) + * 0x: Clock always off + * 10: Clock always on + * 11: Clock on/off according to the PMS + * 3C5.1B[3:1] - Reserved + * 3C5.1B[0] - Primary Displayâs LUT On/Off + * 0: On + * 1: Off */ + ViaSeqMask(hwp, 0x1B, 0xC0, 0xC0); + + /* 3C5.2D[7:6] - E3_ECK_N Selection + * 00: E3_ECK_N + * 01: E3_ECK + * 10: delayed E3_ECK_N + * 11: delayed E3_ECK + * 3C5.2D[5:4] - VCK (Primary Display Clock) PLL Power Control + * 0x: PLL power-off + * 10: PLL always on + * 11: PLL on/off according to the PMS + * 3C5.2D[3:2] - LCK (Secondary Display Clock) PLL Power Control + * 0x: PLL power-off + * 10: PLL always on + * 11: PLL on/off according to the PMS + * 3C5.2D[1:0] - ECK (Engine Clock) PLL Power Control + * 0x: PLL power-off + * 10: PLL always on + * 11: PLL on/off according to the PMS */ + ViaSeqMask(hwp, 0x2D, 0x0C, 0x0C); + + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Exiting viaIGA2Init.\n")); +} + void viaIGA2SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y) { @@ -2860,6 +2921,7 @@ iga2_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, viaIGA2DisplayOutput(pScrn, FALSE); viaIGAInitCommon(pScrn); + viaIGA2Init(pScrn); ViaCRTCInit(pScrn); viaIGA2SetDisplayRegister(pScrn, adjusted_mode); diff --git a/src/via_ums.h b/src/via_ums.h index da2e51f..ad249f1 100644 --- a/src/via_ums.h +++ b/src/via_ums.h @@ -222,6 +222,7 @@ void viaIGA1SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y); void viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode); void viaIGA1Save(ScrnInfoPtr pScrn); void viaIGA1Restore(ScrnInfoPtr pScrn); +void viaIGA2Init(ScrnInfoPtr pScrn); void viaIGA2SetFBStartingAddress(xf86CrtcPtr crtc, int x, int y); void viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode); void viaIGA2Save(ScrnInfoPtr pScrn);
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