configure.ac | 2
src/via_fp.c | 87 +++++++++------
src/via_ums.h | 321 ++++++++++++++++++++++++++++++++++++++++++----------------
3 files changed, 289 insertions(+), 121 deletions(-)
New commits:
commit 431b751ae3efa1397d45995ee71242193899901e
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Wed Jul 5 18:36:46 2017 -0500
Version bumped to 0.6.148
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/configure.ac b/configure.ac
index 7c40151..6119222 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.6.147],
+ [0.6.148],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 8518bd8aed7374f938a3302d1ca4f7425d07f92f
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Wed Jul 5 18:35:07 2017 -0500
Cleanup of viaFPSecondarySoftPowerSeq
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index ba45ecf..b16f672 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -382,32 +382,52 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
viaFPSetSecondaryPowerSeqType(pScrn, FALSE);
if (powerState) {
- /* Turn off hardware power sequence. */
+ /* Turn off FP hardware power sequence. */
viaFPSetSecondaryHardPower(pScrn, FALSE);
+ /* Wait for TD0 ms. */
usleep(TD0);
+
+ /* Turn on FP VDD rail. */
viaFPSetSecondarySoftVDD(pScrn, TRUE);
+ /* Wait for TD1 ms. */
usleep(TD1);
+
+ /* Turn on FP data transmission. */
viaFPSetSecondarySoftData(pScrn, TRUE);
+ /* Wait for TD2 ms. */
usleep(TD2);
+
+ /* Turn on FP VEE rail. */
viaFPSetSecondarySoftVEE(pScrn, TRUE);
+ /* Wait for TD3 ms. */
usleep(TD3);
+
+ /* Turn on FP back light. */
viaFPSetSecondarySoftBackLight(pScrn, TRUE);
} else {
+ /* Turn off FP back light. */
viaFPSetSecondarySoftBackLight(pScrn, FALSE);
+ /* Wait for TD3 ms. */
usleep(TD3);
+
+ /* Turn off FP VEE rail. */
viaFPSetSecondarySoftVEE(pScrn, FALSE);
- /* Delay TD2 msec. */
+ /* Wait for TD2 ms. */
usleep(TD2);
+
+ /* Turn off FP data transmission. */
viaFPSetSecondarySoftData(pScrn, FALSE);
- /* Delay TD1 msec. */
+ /* Wait for TD1 ms. */
usleep(TD1);
+
+ /* Turn off FP VDD rail. */
viaFPSetSecondarySoftVDD(pScrn, FALSE);
}
commit f6df89408915584c23461a6460c6a78d490d732e
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 19:54:46 2017 -0500
Added viaFPSetSecondaryDirectBackLightCtrl
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index 0fe63b5..ba45ecf 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -461,17 +461,19 @@ viaFPSecondaryHardPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
if (powerState) {
/* Turn on back light. */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0x3F);
+ viaFPSetSecondaryDirectBackLightCtrl(pScrn, TRUE);
/* Turn on hardware power sequence. */
viaFPSetSecondaryHardPower(pScrn, TRUE);
} else {
+ /* Make sure display period is turned off. */
+ viaFPSetSecondaryDirectDisplayPeriod(pScrn, FALSE);
+
+ /* Make sure back light is turned off. */
+ viaFPSetSecondaryDirectBackLightCtrl(pScrn, FALSE);
+
/* Turn off hardware power sequence. */
viaFPSetSecondaryHardPower(pScrn, FALSE);
-
- usleep(1);
- /* Turn off back light. */
- hwp->writeCrtc(hwp, 0xD3, 0xC0);
}
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
diff --git a/src/via_ums.h b/src/via_ums.h
index c410c79..6ed01f0 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -808,6 +808,23 @@ viaFPSetSecondarySoftVDD(ScrnInfoPtr pScrn, Bool softOn)
}
/*
+ * Sets CX700 / VX700 or later chipset's FP secondary direct back
+ * light control.
+ */
+static inline void
+viaFPSetSecondaryDirectBackLightCtrl(ScrnInfoPtr pScrn, Bool directOn)
+{
+ /* 3X5.D3[6] - FP Secondary Direct Back Light Control
+ * 0: On
+ * 1: Off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD3,
+ directOn ? 0x00 : BIT(6), BIT(6));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Direct Back Light "
+ "Control: %s\n", directOn ? "On" : "Off"));
+}
+
+/*
* Sets FP secondary hardware controlled power sequence enable bit.
*/
static inline void
commit e7a18d77419ca862502dd9ddb29b8bacba274905
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 19:44:29 2017 -0500
Added viaFPSetSecondarySoftBackLight
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index 5e6cf4e..0fe63b5 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -395,12 +395,9 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
viaFPSetSecondarySoftVEE(pScrn, TRUE);
usleep(TD3);
-
- /* Back-Light ON */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x02);
+ viaFPSetSecondarySoftBackLight(pScrn, TRUE);
} else {
- /* Back-Light OFF */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFD);
+ viaFPSetSecondarySoftBackLight(pScrn, FALSE);
usleep(TD3);
viaFPSetSecondarySoftVEE(pScrn, FALSE);
diff --git a/src/via_ums.h b/src/via_ums.h
index 9315471..c410c79 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -740,6 +740,23 @@ viaFPSetSecondaryPowerSeqType(ScrnInfoPtr pScrn, Bool
ctrlType)
}
/*
+ * Sets CX700 / VX700 or later chipset's FP secondary
+ * software controlled back light.
+ */
+static inline void
+viaFPSetSecondarySoftBackLight(ScrnInfoPtr pScrn, Bool softOn)
+{
+ /* 3X5.D3[1] - FP Secondary Software Back Light On
+ * 0: On
+ * 1: Off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD3,
+ softOn ? 0x00 : BIT(1), BIT(1));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Software Controlled "
+ "Back Light: %s\n", softOn ? "On" : "Off"));
+}
+
+/*
* Sets CX700 / VX700 or later chipset's FP secondary software
* controlled VEE.
*/
commit 7add6ca3663402ff45e4e7877927617c099fd8f0
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 19:38:57 2017 -0500
Added viaFPSetSecondarySoftVEE
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index d00b7e7..5e6cf4e 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -392,9 +392,8 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
viaFPSetSecondarySoftData(pScrn, TRUE);
usleep(TD2);
+ viaFPSetSecondarySoftVEE(pScrn, TRUE);
- /* VEE ON (unused on vt3353)*/
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x04);
usleep(TD3);
/* Back-Light ON */
@@ -402,10 +401,9 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
} else {
/* Back-Light OFF */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFD);
- usleep(TD3);
- /* VEE OFF */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFB);
+ usleep(TD3);
+ viaFPSetSecondarySoftVEE(pScrn, FALSE);
/* Delay TD2 msec. */
usleep(TD2);
diff --git a/src/via_ums.h b/src/via_ums.h
index dfcc3f4..9315471 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -741,6 +741,23 @@ viaFPSetSecondaryPowerSeqType(ScrnInfoPtr pScrn, Bool
ctrlType)
/*
* Sets CX700 / VX700 or later chipset's FP secondary software
+ * controlled VEE.
+ */
+static inline void
+viaFPSetSecondarySoftVEE(ScrnInfoPtr pScrn, Bool softOn)
+{
+ /* 3X5.D3[2] - FP Secondary Software VEE On
+ * 0: On
+ * 1: Off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD3,
+ softOn ? 0x00 : BIT(2), BIT(2));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Software Controlled VEE: %s\n",
+ softOn ? "On" : "Off"));
+}
+
+/*
+ * Sets CX700 / VX700 or later chipset's FP secondary software
* controlled data.
*/
static inline void
commit 8f5997486df0d3f14d3498ba94d0cdabd8d43c25
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 15:58:36 2017 -0500
Added viaFPSetSecondarySoftData
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index 5ef1976..d00b7e7 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -389,9 +389,8 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
viaFPSetSecondarySoftVDD(pScrn, TRUE);
usleep(TD1);
+ viaFPSetSecondarySoftData(pScrn, TRUE);
- /* DATA ON */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x08);
usleep(TD2);
/* VEE ON (unused on vt3353)*/
@@ -407,11 +406,10 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
/* VEE OFF */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFB);
+
/* Delay TD2 msec. */
usleep(TD2);
-
- /* DATA OFF */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xF7);
+ viaFPSetSecondarySoftData(pScrn, FALSE);
/* Delay TD1 msec. */
usleep(TD1);
diff --git a/src/via_ums.h b/src/via_ums.h
index e2e796b..dfcc3f4 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -741,6 +741,23 @@ viaFPSetSecondaryPowerSeqType(ScrnInfoPtr pScrn, Bool
ctrlType)
/*
* Sets CX700 / VX700 or later chipset's FP secondary software
+ * controlled data.
+ */
+static inline void
+viaFPSetSecondarySoftData(ScrnInfoPtr pScrn, Bool softOn)
+{
+ /* 3X5.D3[3] - FP Secondary Software Data On
+ * 0: On
+ * 1: Off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD3,
+ softOn ? 0x00 : BIT(3), BIT(3));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Software Controlled Data: %s\n",
+ softOn ? "On" : "Off"));
+}
+
+/*
+ * Sets CX700 / VX700 or later chipset's FP secondary software
* controlled VDD.
*/
static inline void
commit 72fa65ffd0bf72d152d02b50460f415e3dedc8ce
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 15:55:08 2017 -0500
Added viaFPSetSecondarySoftVDD
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index 408ce84..5ef1976 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -386,9 +386,8 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
viaFPSetSecondaryHardPower(pScrn, FALSE);
usleep(TD0);
+ viaFPSetSecondarySoftVDD(pScrn, TRUE);
- /* VDD ON*/
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x10);
usleep(TD1);
/* DATA ON */
@@ -413,11 +412,10 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
/* DATA OFF */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xF7);
+
/* Delay TD1 msec. */
usleep(TD1);
-
- /* VDD OFF */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xEF);
+ viaFPSetSecondarySoftVDD(pScrn, FALSE);
}
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
diff --git a/src/via_ums.h b/src/via_ums.h
index 62a6ba4..e2e796b 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -740,6 +740,23 @@ viaFPSetSecondaryPowerSeqType(ScrnInfoPtr pScrn, Bool
ctrlType)
}
/*
+ * Sets CX700 / VX700 or later chipset's FP secondary software
+ * controlled VDD.
+ */
+static inline void
+viaFPSetSecondarySoftVDD(ScrnInfoPtr pScrn, Bool softOn)
+{
+ /* 3X5.D3[4] - FP Secondary Software VDD On
+ * 0: On
+ * 1: Off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD3,
+ softOn ? 0x00 : BIT(4), BIT(4));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Software Controlled VDD: %s\n",
+ softOn ? "On" : "Off"));
+}
+
+/*
* Sets FP secondary hardware controlled power sequence enable bit.
*/
static inline void
commit 100eae8db145bb7778fbb33e7fb0308b892c90a3
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 15:50:48 2017 -0500
Use viaFPSetSecondaryPowerSeqType inside viaFPSecondarySoftPowerSeq
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index 8fc622c..408ce84 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -378,12 +378,13 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Entered viaFPSecondarySoftPowerSeq.\n"));
+ /* Use software FP power sequence control. */
+ viaFPSetSecondaryPowerSeqType(pScrn, FALSE);
+
if (powerState) {
/* Turn off hardware power sequence. */
viaFPSetSecondaryHardPower(pScrn, FALSE);
- /* Software control power sequence ON */
- hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x01);
usleep(TD0);
/* VDD ON*/
commit c4c6272607aa82e20f9d5c081f021e69cf5ccc03
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 14:41:39 2017 -0500
Stylistic clean up of inline functions inside via_ums.h
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_ums.h b/src/via_ums.h
index 1cc8ab2..62a6ba4 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -480,6 +480,39 @@ viaDVP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
}
/*
+ * Sets analog (VGA) DAC power.
+ */
+static inline void
+viaAnalogSetPower(ScrnInfoPtr pScrn, Bool outputState)
+{
+ /* 3X5.47[2] - DACOFF Backdoor Register
+ * 0: DAC on
+ * 1: DAC off */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x47,
+ outputState ? 0x00 : BIT(2), BIT(2));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Analog (VGA) Power: %s\n",
+ outputState ? "On" : "Off"));
+}
+
+/*
+ * Sets analog (VGA) DAC off setting.
+ * Only available in CX700 / VX700, VX800, VX855, and VX900 chipsets.
+ */
+static inline void
+viaAnalogSetDACOff(ScrnInfoPtr pScrn, Bool dacOff)
+{
+ /* 3C5.5E[0] - CRT DACOFF Setting
+ * 0: Disabled
+ * 1: DAC is controlled by 3C5.01[5] */
+ ViaSeqMask(VGAHWPTR(pScrn), 0x5E,
+ dacOff ? BIT(0) : 0x00, BIT(0));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Analog (VGA) DAC Off Setting: %s\n",
+ dacOff ? "On" : "Off"));
+}
+
+/*
* Sets analog (VGA) DPMS State.
*/
static inline void
@@ -490,36 +523,25 @@ viaAnalogSetDPMSControl(ScrnInfoPtr pScrn, CARD8
dpmsControl)
* 01: Stand-by
* 10: Suspend
* 11: Off */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x36, dpmsControl << 4,
- BIT(5) | BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x36,
+ dpmsControl << 4, BIT(5) | BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Analog (VGA) DPMS: %s\n",
- ((dpmsControl & (BIT(1) | BIT(0))) == 0x03) ? "Off" :
- ((dpmsControl & (BIT(1) | BIT(0))) == 0x02) ?
"Suspend" :
- ((dpmsControl & (BIT(1) | BIT(0))) == 0x01) ?
"Standby" :
- "On"));
+ ((dpmsControl & (BIT(1) | BIT(0))) == 0x03) ?
+ "Off" :
+ ((dpmsControl & (BIT(1) | BIT(0))) == 0x02) ?
+ "Suspend" :
+ ((dpmsControl & (BIT(1) | BIT(0))) == 0x01) ?
+ "Standby" :
+ "On"));
}
/*
- * Sets analog (VGA) power.
+ * Sets analog (VGA) sync polarity.
*/
static inline void
-viaAnalogSetPower(ScrnInfoPtr pScrn, Bool outputState)
-{
- /* 3X5.47[2] - DACOFF Backdoor Register
- * 0: DAC on
- * 1: DAC off */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x47, outputState ? 0x00 : BIT(2),
- BIT(2));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Analog (VGA) Power: %s\n",
- outputState ? "On" : "Off"));
-}
-
-static inline void
viaAnalogSetSyncPolarity(ScrnInfoPtr pScrn, CARD8 syncPolarity)
{
- /* Set analog (VGA) sync polarity. */
/* 3C2[7] - Analog Vertical Sync Polarity
* 0: Positive
* 1: Negative
@@ -544,33 +566,17 @@ viaAnalogSetSyncPolarity(ScrnInfoPtr pScrn, CARD8
syncPolarity)
static inline void
viaAnalogSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
{
- /* Set analog (VGA) display source. */
/* 3C5.16[6] - CRT Display Source
* 0: Primary Display Stream (IGA1)
* 1: Secondary Display Stream (IGA2) */
- ViaSeqMask(VGAHWPTR(pScrn), 0x16, displaySource << 6, BIT(6));
+ ViaSeqMask(VGAHWPTR(pScrn), 0x16,
+ displaySource << 6, BIT(6));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Analog (VGA) Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
}
/*
- * Sets analog (VGA) DAC off setting.
- * Only available in CX700 / VX700, VX800, VX855, and VX900 chipsets.
- */
-static inline void
-viaAnalogSetDACOff(ScrnInfoPtr pScrn, Bool dacOff)
-{
- /* 3C5.5E[0] - CRT DACOFF Setting
- * 0: Disabled
- * 1: DAC is controlled by 3C5.01[5] */
- ViaSeqMask(VGAHWPTR(pScrn), 0x5E, dacOff ? BIT(0) : 0x00, BIT(0));
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Analog (VGA) DAC Off Setting: %s\n",
- dacOff ? "On" : "Off"));
-}
-
-/*
* Sets KM400 or later chipset's FP primary power sequence control
* type.
*/
@@ -761,13 +767,17 @@ viaFPDPLowSetIOPadState(ScrnInfoPtr pScrn, CARD8
ioPadState)
* 10: Depend on the other control signal
* 11: Pad on/off according to the
* Power Management Status (PMS) */
- ViaSeqMask(VGAHWPTR(pScrn), 0x2A, ioPadState, BIT(1) | BIT(0));
+ ViaSeqMask(VGAHWPTR(pScrn), 0x2A,
+ ioPadState, BIT(1) | BIT(0));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"FPDP Low I/O Pad State: %s\n",
- ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ? "On" :
- ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
"Conditional" :
- ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
- "Off"));
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ?
+ "On" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
+ "Conditional" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ?
+ "Off" :
+ "Off"));
}
/*
@@ -777,8 +787,8 @@ static inline void
viaFPDPLowSetDelayTap(ScrnInfoPtr pScrn, CARD8 delayTap)
{
/* 3X5.99[3:0] - FPDP Low Delay Tap */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x99, delayTap,
- BIT(3) | BIT(2) | BIT(1) | BIT(0));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x99,
+ delayTap, BIT(3) | BIT(2) | BIT(1) | BIT(0));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"FPDP Low Delay Tap: %d\n",
(delayTap & (BIT(3) | BIT(2) |
@@ -794,14 +804,15 @@ viaFPDPLowSetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
/* 3X5.99[4] - FPDP Low Data Source Selection
* 0: Primary Display
* 1: Secondary Display */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x99, displaySource << 4, BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x99,
+ displaySource << 4, BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"FPDP Low Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
}
/*
- * Sets FPDP (Flat Panel Display Port) High I/O pad state
+ * Sets FPDP (Flat Panel Display Port) High I/O pad state.
*/
static inline void
viaFPDPHighSetIOPadState(ScrnInfoPtr pScrn, CARD8 ioPadState)
@@ -811,13 +822,17 @@ viaFPDPHighSetIOPadState(ScrnInfoPtr pScrn, CARD8
ioPadState)
* 10: Depend on the other control signal
* 11: Pad on/off according to the
* Power Management Status (PMS) */
- ViaSeqMask(VGAHWPTR(pScrn), 0x2A, ioPadState << 2, BIT(3) | BIT(2));
+ ViaSeqMask(VGAHWPTR(pScrn), 0x2A,
+ ioPadState << 2, BIT(3) | BIT(2));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"FPDP High I/O Pad State: %s\n",
- ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ? "On" :
- ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
"Conditional" :
- ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ? "Off" :
- "Off"));
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ?
+ "On" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
+ "Conditional" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ?
+ "Off" :
+ "Off"));
}
/*
@@ -844,24 +859,24 @@ viaFPDPHighSetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
/* 3X5.97[4] - FPDP High Data Source Selection
* 0: Primary Display
* 1: Secondary Display */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x97, displaySource << 4, BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x97,
+ displaySource << 4, BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"FPDP High Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
}
/*
- * Sets CX700 or later chipset's LVDS1 power state.
+ * Sets LVDS1 power state.
*/
static inline void
viaLVDS1SetPower(ScrnInfoPtr pScrn, Bool powerState)
{
- /* Set LVDS1 power state. */
/* 3X5.D2[7] - Power Down (Active High) for Channel 1 LVDS
* 0: LVDS1 power on
* 1: LVDS1 power down */
- ViaCrtcMask(VGAHWPTR(pScrn), 0xD2, powerState ? 0x00 : BIT(7),
- BIT(7));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD2,
+ powerState ? 0x00 : BIT(7), BIT(7));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS1 Power State: %s\n",
powerState ? "On" : "Off"));
@@ -902,16 +917,27 @@ viaLVDS1SetSoftVdd(ScrnInfoPtr pScrn, Bool softOn)
}
/*
- * Sets CX700 or later single chipset's LVDS1 I/O pad state.
+ * Sets LVDS1 I/O pad state.
*/
static inline void
viaLVDS1SetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
{
- /* 3C5.2A[1:0] - LVDS1 I/O Pad Control */
- ViaSeqMask(VGAHWPTR(pScrn), 0x2A, ioPadState, BIT(1) | BIT(0));
+ /* 3C5.2A[1:0] - LVDS1 I/O Pad Control
+ * 0x: Pad always off
+ * 10: Depend on the other control signal
+ * 11: Pad on/off according to the
+ * Power Management Status (PMS) */
+ ViaSeqMask(VGAHWPTR(pScrn), 0x2A,
+ ioPadState, BIT(1) | BIT(0));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "LVDS1 I/O Pad State: %d\n",
- (ioPadState & (BIT(1) | BIT(0)))));
+ "LVDS1 I/O Pad State: %s\n",
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ?
+ "On" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
+ "Conditional" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ?
+ "Off" :
+ "Off"));
}
/*
@@ -923,7 +949,8 @@ viaLVDS1SetFormat(ScrnInfoPtr pScrn, CARD8 format)
/* 3X5.D2[1] - LVDS Channel 1 Format Selection
* 0: SPWG Mode
* 1: OPENLDI Mode */
- ViaCrtcMask(VGAHWPTR(pScrn), 0xD2, format << 1, BIT(1));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD2,
+ format << 1, BIT(1));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS1 Format: %s\n",
(format & BIT(0)) ? "OPENLDI" : "SPWG"));
@@ -938,10 +965,12 @@ viaLVDS1SetOutputFormat(ScrnInfoPtr pScrn, CARD8
outputFormat)
/* 3X5.88[6] - LVDS Channel 1 Output Format
* 0: Rotation
* 1: Sequential */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x88, outputFormat << 6, BIT(6));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x88,
+ outputFormat << 6, BIT(6));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS1 Output Format: %s\n",
- (outputFormat & BIT(0)) ? "Sequential" : "Rotation"));
+ (outputFormat & BIT(0)) ?
+ "Sequential" : "Rotation"));
}
/*
@@ -954,54 +983,68 @@ viaLVDS1SetDithering(ScrnInfoPtr pScrn, Bool dithering)
/* 3X5.88[0] - LVDS Channel 1 Output Bits
* 0: 24 bits (dithering off)
* 1: 18 bits (dithering on) */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x88, dithering ? BIT(0) : 0x00, BIT(0));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x88,
+ dithering ? BIT(0) : 0x00, BIT(0));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS1 Color Dithering: %s\n",
- dithering ? "On (18 bit color)" : "Off (24 bit
color)"));
+ dithering ?
+ "On (18 bit color)" : "Off (24 bit color)"));
}
-/* Sets CX700 or later single chipset's LVDS1 display source. */
+/*
+ * Sets LVDS1 display source.
+ */
static inline void
viaLVDS1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
{
/* 3X5.99[4] - LVDS Channel 1 Data Source Selection
* 0: Primary Display
* 1: Secondary Display */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x99, displaySource << 4, BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x99,
+ displaySource << 4, BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS1 Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
}
/*
- * Sets CX700 / VX700 and VX800 chipsets' LVDS2 power state.
+ * Sets LVDS2 power state.
*/
static inline void
viaLVDS2SetPower(ScrnInfoPtr pScrn, Bool powerState)
{
- /* Set LVDS2 power state. */
/* 3X5.D2[6] - Power Down (Active High) for Channel 2 LVDS
* 0: LVDS2 power on
* 1: LVDS2 power down */
- ViaCrtcMask(VGAHWPTR(pScrn), 0xD2, powerState ? 0x00 : BIT(6),
- BIT(6));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD2,
+ powerState ? 0x00 : BIT(6), BIT(6));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS2 Power State: %s\n",
powerState ? "On" : "Off"));
}
/*
- * Sets CX700 or later single chipset's LVDS2 I/O pad state.
+ * Sets LVDS2 I/O pad state.
*/
static inline void
viaLVDS2SetIOPadSetting(ScrnInfoPtr pScrn, CARD8 ioPadState)
{
- /* Set LVDS2 I/O pad state. */
- /* 3C5.2A[3:2] - LVDS2 I/O Pad Control */
- ViaSeqMask(VGAHWPTR(pScrn), 0x2A, ioPadState << 2, 0x0C);
+ /* 3C5.2A[3:2] - LVDS2 I/O Pad Control
+ * 0x: Pad always off
+ * 10: Depend on the other control signal
+ * 11: Pad on/off according to the
+ * Power Management Status (PMS) */
+ ViaSeqMask(VGAHWPTR(pScrn), 0x2A,
+ ioPadState << 2, BIT(3) | BIT(2));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "LVDS2 I/O Pad State: %d\n",
- (ioPadState & 0x03)));
+ "LVDS2 I/O Pad State: %s\n",
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x03) ?
+ "On" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x02) ?
+ "Conditional" :
+ ((ioPadState & (BIT(1) | BIT(0))) == 0x01) ?
+ "Off" :
+ "Off"));
}
/*
@@ -1051,7 +1094,7 @@ viaLVDS2SetDithering(ScrnInfoPtr pScrn, Bool dithering)
}
/*
- * Sets CX700 or later single chipset's LVDS2 display source.
+ * Sets LVDS2 display source.
*/
static inline void
viaLVDS2SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
@@ -1059,7 +1102,8 @@ viaLVDS2SetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
/* 3X5.97[4] - LVDS Channel 2 Data Source Selection
* 0: Primary Display
* 1: Secondary Display */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x97, displaySource << 4, BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x97,
+ displaySource << 4, BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"LVDS2 Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
@@ -1071,12 +1115,11 @@ viaLVDS2SetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
static inline void
viaTMDSSetPower(ScrnInfoPtr pScrn, Bool powerState)
{
- /* Set TMDS (DVI) power state. */
/* 3X5.D2[3] - Power Down (Active High) for DVI
* 0: TMDS power on
* 1: TMDS power down */
- ViaCrtcMask(VGAHWPTR(pScrn), 0xD2, powerState ? 0 : BIT(3),
- BIT(3));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD2,
+ powerState ? 0x00 : BIT(3), BIT(3));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"TMDS (DVI) Power State: %s\n",
powerState ? "On" : "Off"));
@@ -1095,7 +1138,8 @@ viaTMDSSetSyncPolarity(ScrnInfoPtr pScrn, CARD8
syncPolarity)
* 3X5.97[5] - DVI (TMDS) HSYNC Polarity
* 0: Positive
* 1: Negative */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x97, syncPolarity << 5, BIT(6) | BIT(5));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x97,
+ syncPolarity << 5, BIT(6) | BIT(5));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"TMDS (DVI) Horizontal Sync Polarity: %s\n",
(syncPolarity & BIT(0)) ? "-" : "+"));
@@ -1116,7 +1160,8 @@ viaTMDSSetDisplaySource(ScrnInfoPtr pScrn, CARD8
displaySource)
/* 3X5.99[4] - LVDS Channel1 Data Source Selection
* 0: Primary Display
* 1: Secondary Display */
- ViaCrtcMask(VGAHWPTR(pScrn), 0x99, displaySource << 4, BIT(4));
+ ViaCrtcMask(VGAHWPTR(pScrn), 0x99,
+ displaySource << 4, BIT(4));
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"TMDS (DVI) Display Source: IGA%d\n",
(displaySource & 0x01) + 1));
commit 2278ac20b6e5ad716d92771520880940a59b3e04
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 11:08:25 2017 -0500
Added viaFPSetSecondaryHardPower
This is an inline function.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index a65f9d7..8fc622c 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -379,8 +379,8 @@ viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
"Entered viaFPSecondarySoftPowerSeq.\n"));
if (powerState) {
- /* Secondary power hardware power sequence enable 0:off 1: on */
- hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) & 0xFD);
+ /* Turn off hardware power sequence. */
+ viaFPSetSecondaryHardPower(pScrn, FALSE);
/* Software control power sequence ON */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) | 0x01);
@@ -470,11 +470,13 @@ viaFPSecondaryHardPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
if (powerState) {
/* Turn on back light. */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0x3F);
+
/* Turn on hardware power sequence. */
- hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) | 0x02);
+ viaFPSetSecondaryHardPower(pScrn, TRUE);
} else {
- /* Turn off power sequence. */
- hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) & 0xFD);
+ /* Turn off hardware power sequence. */
+ viaFPSetSecondaryHardPower(pScrn, FALSE);
+
usleep(1);
/* Turn off back light. */
hwp->writeCrtc(hwp, 0xD3, 0xC0);
diff --git a/src/via_ums.h b/src/via_ums.h
index 9f623fd..1cc8ab2 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -734,6 +734,23 @@ viaFPSetSecondaryPowerSeqType(ScrnInfoPtr pScrn, Bool
ctrlType)
}
/*
+ * Sets FP secondary hardware controlled power sequence enable bit.
+ */
+static inline void
+viaFPSetSecondaryHardPower(ScrnInfoPtr pScrn, Bool powerState)
+{
+ /* 3X5.D4[1] - Secondary Power Hardware Power Sequence Enable
+ * 0: Off
+ * 1: On */
+ ViaCrtcMask(VGAHWPTR(pScrn), 0xD4,
+ powerState ? BIT(1) : 0x00, BIT(1));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "FP Secondary Hardware Controlled Power "
+ "Sequence: %s\n",
+ powerState ? "On" : "Off"));
+}
+
+/*
* Sets FPDP (Flat Panel Display Port) Low I/O pad state.
*/
static inline void
commit d999b78048431517c2d09310f58bada897be45f4
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Tue Jul 4 11:06:02 2017 -0500
Renamed ViaLVDSSoftwarePowerSecondSequence
The new name is viaFPSecondarySoftPowerSeq.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/src/via_fp.c b/src/via_fp.c
index e9186bf..a65f9d7 100644
--- a/src/via_fp.c
+++ b/src/via_fp.c
@@ -371,12 +371,14 @@ viaFPPrimarySoftPowerSeq(ScrnInfoPtr pScrn, Bool
powerState)
}
static void
-ViaLVDSSoftwarePowerSecondSequence(ScrnInfoPtr pScrn, Bool on)
+viaFPSecondarySoftPowerSeq(ScrnInfoPtr pScrn, Bool powerState)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"ViaLVDSSoftwarePowerSecondSequence: %d\n", on));
- if (on) {
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Entered viaFPSecondarySoftPowerSeq.\n"));
+
+ if (powerState) {
/* Secondary power hardware power sequence enable 0:off 1: on */
hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) & 0xFD);
@@ -416,6 +418,9 @@ ViaLVDSSoftwarePowerSecondSequence(ScrnInfoPtr pScrn, Bool
on)
/* VDD OFF */
hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xEF);
}
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Exiting viaFPSecondarySoftPowerSeq.\n"));
}
static void
@@ -510,7 +515,7 @@ viaFPPower(ScrnInfoPtr pScrn, int Chipset, CARD16 diPort,
Bool powerState)
}
if (diPort & VIA_DI_PORT_LVDS2) {
- ViaLVDSSoftwarePowerSecondSequence(pScrn, powerState);
+ viaFPSecondarySoftPowerSeq(pScrn, powerState);
viaLVDS2SetPower(pScrn, powerState);
}
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