drivers/gpu/drm/via/crtc_hw.h | 30 +++++
drivers/gpu/drm/via/via_drv.h | 4
drivers/gpu/drm/via/via_fp.c | 221 +++++++++++++++++++++++++++++++++++++++++-
3 files changed, 250 insertions(+), 5 deletions(-)
New commits:
commit d0a806302dfb5b61c909a87e6477b4cbf03ec56e
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 18:57:50 2017 -0500
Version bumped to 3.0.40
Made substantial changes to how FP is power on / off.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index 47d2ac2c504..362e697ab78 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -30,11 +30,11 @@
#define DRIVER_AUTHOR "The OpenChrome Project"
#define DRIVER_NAME "via"
#define DRIVER_DESC "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE "20170706"
+#define DRIVER_DATE "20170707"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 39
+#define DRIVER_PATCHLEVEL 40
#include <linux/module.h>
commit 71d5f9c65f8eba8020fe00beddf50ea7f241a58c
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 18:54:47 2017 -0500
Added via_fp_power
This function replaces via_enable_internal_lvds and
via_disable_internal_lvds functions.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index 17655593568..1d730a9eab9 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -395,6 +395,52 @@ via_fp_primary_hard_power_seq(struct via_device *dev_priv,
bool power_state)
DRM_DEBUG_KMS("Entered via_fp_primary_hard_power_seq.\n");
}
+static void
+via_fp_power(struct via_device *dev_priv, unsigned short device,
+ u32 di_port, bool power_state)
+{
+ DRM_DEBUG_KMS("Entered via_fp_power.\n");
+
+ switch (device) {
+ case PCI_DEVICE_ID_VIA_CLE266:
+ break;
+ case PCI_DEVICE_ID_VIA_KM400:
+ case PCI_DEVICE_ID_VIA_CN700:
+ case PCI_DEVICE_ID_VIA_PM800:
+ case PCI_DEVICE_ID_VIA_K8M800:
+ case PCI_DEVICE_ID_VIA_VT3343:
+ case PCI_DEVICE_ID_VIA_K8M890:
+ case PCI_DEVICE_ID_VIA_P4M900:
+ via_fp_primary_hard_power_seq(dev_priv, power_state);
+ break;
+ case PCI_DEVICE_ID_VIA_VT3157:
+ case PCI_DEVICE_ID_VIA_VT1122:
+ if (di_port & VIA_DI_PORT_LVDS1) {
+ via_fp_primary_soft_power_seq(dev_priv, power_state);
+ via_lvds1_set_power(VGABASE, power_state);
+ }
+
+ if (di_port & VIA_DI_PORT_LVDS2) {
+ via_fp_secondary_soft_power_seq(dev_priv, power_state);
+ via_lvds2_set_power(VGABASE, power_state);
+ }
+
+ break;
+ case PCI_DEVICE_ID_VIA_VX875:
+ case PCI_DEVICE_ID_VIA_VX900_VGA:
+ via_fp_primary_hard_power_seq(dev_priv, power_state);
+ via_lvds1_set_power(VGABASE, power_state);
+ break;
+ default:
+ DRM_DEBUG_KMS("VIA Technologies Chrome IGP "
+ "FP Power: Unrecognized "
+ "PCI Device ID.\n");
+ break;
+ }
+
+ DRM_DEBUG_KMS("Exiting via_fp_power.\n");
+}
+
/*
* Sets flat panel I/O pad state.
*/
@@ -523,14 +569,15 @@ via_fp_dpms(struct drm_encoder *encoder, int mode)
}
svga_wseq_mask(VGABASE, 0x1E, BIT(3), BIT(3));
}
- via_enable_internal_lvds(encoder);
- via_fp_io_pad_state(dev_priv, enc->di_port, true);
+
+ via_fp_power(dev_priv, dev->pdev->device, enc->di_port, true);
+ via_fp_io_pad_state(dev_priv, enc->di_port, true);
break;
case DRM_MODE_DPMS_STANDBY:
case DRM_MODE_DPMS_SUSPEND:
case DRM_MODE_DPMS_OFF:
- via_disable_internal_lvds(encoder);
+ via_fp_power(dev_priv, dev->pdev->device, enc->di_port, false);
via_fp_io_pad_state(dev_priv, enc->di_port, false);
break;
}
commit e26c6bcc526929ce2a3a22c5f35423bfe8671306
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 17:45:56 2017 -0500
Added via_lvds2_set_power
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 20e341f55f4..54860250f59 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -764,6 +764,21 @@ via_lvds1_set_display_source(void __iomem *regs, u8
display_source)
}
/*
+ * Sets CX700 / VX700 and VX800 chipset's LVDS2 power state.
+ */
+static inline void
+via_lvds2_set_power(void __iomem *regs, bool power_state)
+{
+ /* 3X5.D2[6] - Power Down (Active High) for Channel 2 LVDS
+ * 0: Power on
+ * 1: Power off */
+ svga_wcrt_mask(regs, 0xD2,
+ power_state ? 0x00 : BIT(6), BIT(6));
+ DRM_DEBUG_KMS("LVDS2 Power State: %s\n",
+ power_state ? "On" : "Off");
+}
+
+/*
* Sets LVDS2 I/O pad state.
*/
static inline void
commit e8eb50ee77ca9295a845c1a995897a67dd4fe737
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 17:40:15 2017 -0500
Added via_lvds1_set_power
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 9224df16868..20e341f55f4 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -648,6 +648,21 @@ via_fpdp_high_set_display_source(void __iomem *regs, u8
display_source)
}
/*
+ * Sets CX700 / VX700 or later chipset's LVDS1 power state.
+ */
+static inline void
+via_lvds1_set_power(void __iomem *regs, bool power_state)
+{
+ /* 3X5.D2[7] - Power Down (Active High) for Channel 1 LVDS
+ * 0: Power on
+ * 1: Power off */
+ svga_wcrt_mask(regs, 0xD2,
+ power_state ? 0x00 : BIT(7), BIT(7));
+ DRM_DEBUG_KMS("LVDS1 Power State: %s\n",
+ power_state ? "On" : "Off");
+}
+
+/*
* Sets CX700 or later single chipset's LVDS1 power sequence type.
*/
static inline void
commit ff311da0f99217bf67e9fbca7fe729de3467555c
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 15:03:27 2017 -0500
Added via_fp_primary_hard_power_seq
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index 20b494234c5..17655593568 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -364,6 +364,37 @@ via_fp_secondary_soft_power_seq(struct via_device
*dev_priv, bool power_state)
DRM_DEBUG_KMS("Exiting via_fp_secondary_soft_power_seq.\n");
}
+static void
+via_fp_primary_hard_power_seq(struct via_device *dev_priv, bool power_state)
+{
+ DRM_DEBUG_KMS("Entered via_fp_primary_hard_power_seq.\n");
+
+ /* Use hardware FP power sequence control. */
+ via_fp_set_primary_power_seq_type(VGABASE, true);
+
+ if (power_state) {
+ /* Turn on FP Display Period. */
+ via_fp_set_primary_direct_display_period(VGABASE, true);
+
+ /* Turn on FP hardware power sequence. */
+ via_fp_set_primary_hard_power(VGABASE, true);
+
+ /* Turn on FP back light. */
+ via_fp_set_primary_direct_back_light_ctrl(VGABASE, true);
+ } else {
+ /* Turn off FP back light. */
+ via_fp_set_primary_direct_back_light_ctrl(VGABASE, false);
+
+ /* Turn off FP hardware power sequence. */
+ via_fp_set_primary_hard_power(VGABASE, false);
+
+ /* Turn on FP Display Period. */
+ via_fp_set_primary_direct_display_period(VGABASE, false);
+ }
+
+ DRM_DEBUG_KMS("Entered via_fp_primary_hard_power_seq.\n");
+}
+
/*
* Sets flat panel I/O pad state.
*/
commit d1a10f7cf55bcf09f2515258cc8bd4a1ff1cf056
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 14:14:53 2017 -0500
Added via_fp_secondary_soft_power_seq
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index cbe9a038977..20b494234c5 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -297,6 +297,73 @@ via_fp_primary_soft_power_seq(struct via_device *dev_priv,
bool power_state)
DRM_DEBUG_KMS("Exiting via_fp_primary_soft_power_seq.\n");
}
+static void
+via_fp_secondary_soft_power_seq(struct via_device *dev_priv, bool power_state)
+{
+ DRM_DEBUG_KMS("Entered via_fp_secondary_soft_power_seq.\n");
+
+ /* Turn off FP hardware power sequence. */
+ via_fp_set_secondary_hard_power(VGABASE, false);
+
+ /* Use software FP power sequence control. */
+ via_fp_set_secondary_power_seq_type(VGABASE, false);
+
+ if (power_state) {
+ /* Turn on FP Display Period. */
+ via_fp_set_secondary_direct_display_period(VGABASE, true);
+
+ /* Wait for TD0 ms. */
+ mdelay(TD0);
+
+ /* Turn on FP VDD rail. */
+ via_fp_set_secondary_soft_vdd(VGABASE, true);
+
+ /* Wait for TD1 ms. */
+ mdelay(TD1);
+
+ /* Turn on FP data transmission. */
+ via_fp_set_secondary_soft_data(VGABASE, true);
+
+ /* Wait for TD2 ms. */
+ mdelay(TD2);
+
+ /* Turn on FP VEE rail. */
+ via_fp_set_secondary_soft_vee(VGABASE, true);
+
+ /* Wait for TD3 ms. */
+ mdelay(TD3);
+
+ /* Turn on FP back light. */
+ via_fp_set_secondary_soft_back_light(VGABASE, true);
+ } else {
+ /* Turn off FP back light. */
+ via_fp_set_secondary_soft_back_light(VGABASE, false);
+
+ /* Wait for TD3 ms. */
+ mdelay(TD3);
+
+ /* Turn off FP VEE rail. */
+ via_fp_set_secondary_soft_vee(VGABASE, false);
+
+ /* Wait for TD2 ms. */
+ mdelay(TD2);
+
+ /* Turn off FP data transmission. */
+ via_fp_set_secondary_soft_data(VGABASE, false);
+
+ /* Wait for TD1 ms. */
+ mdelay(TD1);
+
+ /* Turn off FP VDD rail. */
+ via_fp_set_secondary_soft_vdd(VGABASE, false);
+
+ /* Turn off FP Display Period. */
+ via_fp_set_secondary_direct_display_period(VGABASE, false);
+ }
+
+ DRM_DEBUG_KMS("Exiting via_fp_secondary_soft_power_seq.\n");
+}
+
/*
* Sets flat panel I/O pad state.
*/
commit f6925580b54bb258d0e19501012de41052e993ca
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 14:12:43 2017 -0500
Added via_fp_primary_soft_power_seq
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index 1f7a9919fdd..cbe9a038977 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -233,6 +233,70 @@ via_disable_internal_lvds(struct drm_encoder *encoder)
}
}
+static void
+via_fp_primary_soft_power_seq(struct via_device *dev_priv, bool power_state)
+{
+ DRM_DEBUG_KMS("Entered via_fp_primary_soft_power_seq.\n");
+
+ /* Use software FP power sequence control. */
+ via_fp_set_primary_power_seq_type(VGABASE, false);
+
+ if (power_state) {
+ /* Turn on FP Display Period. */
+ via_fp_set_primary_direct_display_period(VGABASE, true);
+
+ /* Wait for TD0 ms. */
+ mdelay(TD0);
+
+ /* Turn on FP VDD rail. */
+ via_fp_set_primary_soft_vdd(VGABASE, true);
+
+ /* Wait for TD1 ms. */
+ mdelay(TD1);
+
+ /* Turn on FP data transmission. */
+ via_fp_set_primary_soft_data(VGABASE, true);
+
+ /* Wait for TD2 ms. */
+ mdelay(TD2);
+
+ /* Turn on FP VEE rail. */
+ via_fp_set_primary_soft_vee(VGABASE, true);
+
+ /* Wait for TD3 ms. */
+ mdelay(TD3);
+
+ /* Turn on FP back light. */
+ via_fp_set_primary_soft_back_light(VGABASE, true);
+ } else {
+ /* Turn off FP back light. */
+ via_fp_set_primary_soft_back_light(VGABASE, false);
+
+ /* Wait for TD3 ms. */
+ mdelay(TD3);
+
+ /* Turn off FP VEE rail. */
+ via_fp_set_primary_soft_vee(VGABASE, false);
+
+ /* Wait for TD2 ms. */
+ mdelay(TD2);
+
+ /* Turn off FP data transmission. */
+ via_fp_set_primary_soft_data(VGABASE, false);
+
+ /* Wait for TD1 ms. */
+ mdelay(TD1);
+
+ /* Turn off FP VDD rail. */
+ via_fp_set_primary_soft_vdd(VGABASE, false);
+
+ /* Turn off FP Display Period. */
+ via_fp_set_primary_direct_display_period(VGABASE, false);
+ }
+
+ DRM_DEBUG_KMS("Exiting via_fp_primary_soft_power_seq.\n");
+}
+
/*
* Sets flat panel I/O pad state.
*/
commit ad0f71fd1aaf6aba3c3c19702c605376a32391c0
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Fri Jul 7 14:10:25 2017 -0500
Added software controlled FP power up / down delay parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/via/via_fp.c b/drivers/gpu/drm/via/via_fp.c
index 238f3b6c9ba..1f7a9919fdd 100644
--- a/drivers/gpu/drm/via/via_fp.c
+++ b/drivers/gpu/drm/via/via_fp.c
@@ -26,6 +26,12 @@
/* Encoder flags for LVDS */
#define LVDS_DUAL_CHANNEL 1
+#define TD0 200
+#define TD1 25
+#define TD2 0
+#define TD3 25
+
+
/* caculate the cetering timing using mode and adjusted_mode */
static void
via_centering_timing(const struct drm_display_mode *mode,
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