drivers/gpu/drm/openchrome/via_crtc.c | 4 ++--
drivers/gpu/drm/openchrome/via_drv.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
New commits:
commit 94e7f6d77b72befefa3e2095351ed87697319adf
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Nov 16 22:09:53 2017 -0800
drm/openchrome: Version bumped to 3.0.57
A fix for KM400(A) family's FP distortion bug discovered recently.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_drv.h
b/drivers/gpu/drm/openchrome/via_drv.h
index 7f4d04270b98..d5f8ba0257be 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -30,11 +30,11 @@
#define DRIVER_AUTHOR "OpenChrome Project"
#define DRIVER_NAME "openchrome"
#define DRIVER_DESC "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE "20171103"
+#define DRIVER_DATE "20171116"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 56
+#define DRIVER_PATCHLEVEL 57
#include <linux/module.h>
commit 40ce9f45be91b13b4c80625c826c7bd55a4e6f9d
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Nov 16 22:06:42 2017 -0800
drm/openchrome: Not increment horizontal display fetch count by 1
This does not appear to affect newer devices, but it causes KM400(A)
chipset family's FP to display a slanted picture. The problem was
observed on Averatec 3250HX laptop likely with KN400(A) chipset (not
sure it is KN400 or KN400A).
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index 6a76f894e7ae..c07766c39adf 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -1336,7 +1336,7 @@ via_iga1_mode_set_base_atomic(struct drm_crtc *crtc,
/* Load fetch count registers */
pitch = ALIGN(crtc->mode.hdisplay * (fb->format->cpp[0] * 8) >> 3, 16);
- load_value_to_registers(VGABASE, &iga->fetch, (pitch >> 4) + 1);
+ load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
/* Set the primary pitch */
pitch = ALIGN(fb->pitches[0], 16);
@@ -1650,7 +1650,7 @@ via_iga2_mode_set_base_atomic(struct drm_crtc *crtc,
/* Load fetch count registers */
pitch = ALIGN(crtc->mode.hdisplay * (fb->format->cpp[0] * 8) >> 3, 16);
- load_value_to_registers(VGABASE, &iga->fetch, (pitch >> 4) + 1);
+ load_value_to_registers(VGABASE, &iga->fetch, pitch >> 4);
/* Set secondary pitch */
pitch = ALIGN(fb->pitches[0], 16);
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