drivers/gpu/drm/openchrome/via_crtc.c | 120 ++++++++++++++++++++----------
drivers/gpu/drm/openchrome/via_disp_reg.h | 2
drivers/gpu/drm/openchrome/via_drv.h | 4 -
3 files changed, 83 insertions(+), 43 deletions(-)
New commits:
commit 548bcbc86410f1e8783f28a65773782a490408f0
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:57:57 2017 -0600
drm/openchrome: Version bumped to 3.0.68
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_drv.h
b/drivers/gpu/drm/openchrome/via_drv.h
index db2e32936325..da6e2083d112 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -30,11 +30,11 @@
#define DRIVER_AUTHOR "OpenChrome Project"
#define DRIVER_NAME "openchrome"
#define DRIVER_DESC "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE "20171220"
+#define DRIVER_DATE "20171221"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 67
+#define DRIVER_PATCHLEVEL 68
#include <linux/module.h>
commit d58924a96021da3b4186de6ee571e516821d67b5
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:55:55 2017 -0600
drm/openchrome: Reorganize P4M900 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index 35ab993d6b1a..be095641e4b6 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -743,12 +743,19 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
/* SR22[4:0] */
iga->display_queue_expire_num = P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
-
- /* P4M900 */
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
+ /* SR17[7:0] */
+ iga->fifo_max_depth = P4M900_IGA1_FIFO_MAX_DEPTH;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = P4M900_IGA1_FIFO_THRESHOLD;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = P4M900_IGA1_FIFO_HIGH_THRESHOLD;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* VX800 */
@@ -1018,12 +1025,19 @@ static void via_iga2_display_fifo_regs(struct
drm_device *dev,
/* CR94[6:0] */
iga->display_queue_expire_num = P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
-
- /* P4M900 */
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_max_depth = P4M900_IGA2_FIFO_MAX_DEPTH;
+
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_threshold = P4M900_IGA2_FIFO_THRESHOLD;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = P4M900_IGA2_FIFO_HIGH_THRESHOLD;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* VX800 */
commit f76ca5b13db98bbdbebc97fea3b972027c157725
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:47:28 2017 -0600
drm/openchrome: Reorganize P4M800 Pro IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index 343cb4ba850f..35ab993d6b1a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -697,16 +697,16 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* SR17[7:0] */
- iga->fifo_max_depth = 96;
+ iga->fifo_max_depth = CN700_IGA1_FIFO_MAX_DEPTH;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 80;
+ iga->fifo_threshold = CN700_IGA1_FIFO_THRESHOLD;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 64;
+ iga->fifo_high_threshold = CN700_IGA1_FIFO_HIGH_THRESHOLD;
/* SR22[4:0] */
- iga->display_queue_expire_num = 128;
+ iga->display_queue_expire_num = CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
@@ -971,16 +971,16 @@ static void via_iga2_display_fifo_regs(struct drm_device
*dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 96;
+ iga->fifo_max_depth = CN700_IGA2_FIFO_MAX_DEPTH;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 80;
+ iga->fifo_threshold = CN700_IGA2_FIFO_THRESHOLD;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 32;
+ iga->fifo_high_threshold = CN700_IGA2_FIFO_HIGH_THRESHOLD;
/* CR94[6:0] */
- iga->display_queue_expire_num = 128;
+ iga->display_queue_expire_num = CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
commit a7aaaaebfd429c947407f523b576a0fdfdedef1d
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:44:43 2017 -0600
drm/openchrome: Adjusting P4M800 Pro IGA1 Display Queue Expire Number
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_disp_reg.h
b/drivers/gpu/drm/openchrome/via_disp_reg.h
index a8a27e2fb8ec..a3b2cf8ddcbe 100644
--- a/drivers/gpu/drm/openchrome/via_disp_reg.h
+++ b/drivers/gpu/drm/openchrome/via_disp_reg.h
@@ -36,7 +36,7 @@
#define CN700_IGA1_FIFO_MAX_DEPTH 96 /* location:
{SR17,0,7}*/
#define CN700_IGA1_FIFO_THRESHOLD 80 /* location:
{SR16,0,5},{SR16,7,7}*/
#define CN700_IGA1_FIFO_HIGH_THRESHOLD 64 /* location:
{SR18,0,5},{SR18,7,7}*/
-#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0 /* location:
{SR22,0,4}. (128/4) =64,
+#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 128 /* location:
{SR22,0,4}. (128/4) =64,
* P800 must be set
zero, because HW
* only 5 bits */
#define CN700_IGA2_FIFO_MAX_DEPTH 96 /* location:
{CR68,4,7},{CR94,7,7},{CR95,7,7}*/
commit ce230801b367b43a9002a38aed95b38fba9fdb5c
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:40:35 2017 -0600
drm/openchrome: Reorganize K8M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index 6b2f635cd351..343cb4ba850f 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -718,16 +718,16 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
/* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
/* SR17[7:0] */
- iga->fifo_max_depth = 360;
+ iga->fifo_max_depth = K8M890_IGA1_FIFO_MAX_DEPTH;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 328;
+ iga->fifo_threshold = K8M890_IGA1_FIFO_THRESHOLD;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 296;
+ iga->fifo_high_threshold = K8M890_IGA1_FIFO_HIGH_THRESHOLD;
/* SR22[4:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
@@ -993,16 +993,16 @@ static void via_iga2_display_fifo_regs(struct drm_device
*dev,
/* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 360;
+ iga->fifo_max_depth = K8M890_IGA2_FIFO_MAX_DEPTH;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 328;
+ iga->fifo_threshold = K8M890_IGA2_FIFO_THRESHOLD;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 296;
+ iga->fifo_high_threshold = K8M890_IGA2_FIFO_HIGH_THRESHOLD;
/* CR94[6:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
commit 276a8b950040098e58c4111c2320223e95fe623b
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:35:55 2017 -0600
drm/openchrome: Reorganize P4M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index e5bcd529e785..6b2f635cd351 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -729,13 +729,19 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
/* SR22[4:0] */
iga->display_queue_expire_num = 124;
break;
-
- /* P4M890 */
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
+ /* SR17[7:0] */
+ iga->fifo_max_depth = P4M890_IGA1_FIFO_MAX_DEPTH;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = P4M890_IGA1_FIFO_THRESHOLD;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = P4M890_IGA1_FIFO_HIGH_THRESHOLD;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M900 */
@@ -998,12 +1004,19 @@ static void via_iga2_display_fifo_regs(struct drm_device
*dev,
/* CR94[6:0] */
iga->display_queue_expire_num = 124;
break;
- /* P4M890 */
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_max_depth = P4M890_IGA2_FIFO_MAX_DEPTH;
+
+ /* CR95[6:4], CR68[3:0] */
+ iga->fifo_threshold = P4M890_IGA2_FIFO_THRESHOLD;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = P4M890_IGA2_FIFO_HIGH_THRESHOLD;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M900 */
commit 0ae66dd7e86dce21f63e1ded6f60448d4c93ba52
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 02:17:47 2017 -0600
drm/openchrome: Cleaned up K8M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index f0d8eeb110fd..e5bcd529e785 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -715,12 +715,19 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
iga->fifo_max_depth = 192;
break;
- /* K8M890 */
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
+ /* SR17[7:0] */
iga->fifo_max_depth = 360;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = 328;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = 296;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
break;
/* P4M890 */
@@ -977,14 +984,20 @@ static void via_iga2_display_fifo_regs(struct drm_device
*dev,
iga->fifo_max_depth = 96;
break;
- /* K8M890 */
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
+ /* CR95[7], CR94[7], CR68[7:4] */
iga->fifo_max_depth = 360;
- break;
+ /* CR95[6:4], CR68[3:0] */
+ iga->fifo_threshold = 328;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = 296;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = 124;
+ break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
iga->display_queue_expire_num = 32;
commit 783b98610598a76913135c20ef7e30f5a6650c4b
Author: Kevin Brace <kevinbr...@gmx.com>
Date: Thu Dec 21 01:45:42 2017 -0600
drm/openchrome: Changing P4M800 Pro IGA1 and IGA2 display FIFO parameters
The display FIFO parameters came from a newer VIA Technologies Chrome IGP
open source DDX device driver.
Signed-off-by: Kevin Brace <kevinbr...@gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c
b/drivers/gpu/drm/openchrome/via_crtc.c
index 6ec41dbabec6..f0d8eeb110fd 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -697,16 +697,16 @@ static void via_iga1_display_fifo_regs(struct drm_device
*dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* SR17[7:0] */
- iga->fifo_max_depth = 128;
+ iga->fifo_max_depth = 96;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 32;
+ iga->fifo_threshold = 80;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 56;
+ iga->fifo_high_threshold = 64;
/* SR22[4:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = 128;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
@@ -958,16 +958,16 @@ static void via_iga2_display_fifo_regs(struct drm_device
*dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 128;
+ iga->fifo_max_depth = 96;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 32;
+ iga->fifo_threshold = 80;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 56;
+ iga->fifo_high_threshold = 32;
/* CR94[6:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = 128;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
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