Xilinx let ISE 13.2 (O.61xd) go live this morning. We are in the process of building and testing bitstreams with what hopefully will be "shoulder-shrug". If you are still using (as many are) my upstream repo https://github.com/ShepardSiegel/ocpi You will need to recompile the BSV primitives into new V5 and V6 XST libraries. If you fail to do this, you will see errors from XST as it tries and fails to use the 13.1 flavor. (NetFPGA people, this doesn't affect you, as you build from Verilog each time - no pesky XST libs). The only reason I'm not super-guilty about not scripting this is because Jim's Makefile in "the real" opencpi.org just does it correctly. There is a .prj and two .xst's in $OPCI/scripts/buildhdl ; but you have to manually move the libs to $OCPI/libsrc/hdl/bsv ... We will cry "uncle" if we see anything unusual. We will focus on ML605 (V6) and NF10 (V5) platforms for starters. We do have a KC705 (K7) that we will slip in once things stabilize. ... Uncle: This comes from by build script right after map finishes...
Mapping completed. See MAP report file "fpgaTop_map.mrp" for details. /opt/Xilinx/13.2/ISE_DS/ISE/bin/lin64/unwrapped/map: symbol lookup error: /opt/Xilinx/13.2/ISE_DS/ISE//lib/lin64/libXst_Core.so: undefined symbol: _ZN5antlr6BitSetD1Ev RHEL5 64b WS. Any ideas? -Shep
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