The latest checkins to make some new things work have unfortunately
broken something that testing missed. Thanks for the report, we'll
check into it shortly.
As far as the timing errors, did you look at the worst case slack?
Jim
On 11/17/11 3:39 PM, chas williams - CONTRACTOR wrote:
i have built the latest opencpi git repo and tried to run the testRpl
applications testbias with an ml605 development board. i have a couple
problems, first:
(gdb) run -x hdl/applications/testbias/target-ml605/testbias-ml605.bit.gz -r1if
-r3of -N0o 1 -N1i 1 -N3o 1 -N0i 1 -I 4 -i 1 0000:04:00.0
Starting program:
/scratch/chas/opencpi/tools/cdk/export/bin/linux-x86_64/testRpl -x
hdl/applications/testbias/target-ml605/testbias-ml605.bit.gz -r1if -r3of -N0o 1
-N1i 1 -N3o 1 -N0i 1 -I 4 -i 1 0000:04:00.0
[Thread debugging using libthread_db enabled]
In PIOXferFactory::PIOXferFactory()
In PCIPIOXferFactory::PCIPIOXferFactory()
Starting: sending 1 messages of 4 (buffer 9000)
Buffer counts: 0o 1 1i 1 3o 1 6i 2 8o 2 0i 1 9i 2 9o 2
Active indicators: 0o (null) 1i flowcontrol 3o flowcontrol 6i (null) 8o (null)
0i (null)
++++++++ In void XferFactoryManager::startup(), ref count = 0
OCFRP: 0000:04:00.0, with bitstream birthday: Tue Aug 16 17:44:19 2011
For HDL container 0000:04:00.0, when loading bitstream
hdl/applications/testbias/target-ml605/testbias-ml605.bit.gz, uuid matches what
is already loaded
Port in has ordinal = 0
Port out has ordinal = 1
Port message has ordinal = 2
Timeout for $sma is 4
Port in has ordinal = 0
Port out has ordinal = 1
Timeout for $bias is 8
Port in has ordinal = 0
Port out has ordinal = 1
Port message has ordinal = 2
Timeout for $sma is 4
Timeout for $dp is 4
Timeout for $dp is 4
Program received signal SIGSEGV, Segmentation fault.
*__GI___strcasecmp (s1=0x0, s2=0x7ffff77663f6 "passive") at strcasecmp.c:65
65 strcasecmp.c: No such file or directory.
in strcasecmp.c
(gdb) where
#0 *__GI___strcasecmp (s1=0x0, s2=0x7ffff77663f6 "passive") at strcasecmp.c:65
#1 0x00007ffff775f977 in OCPI::Container::PortData::setPortParams
(this=0x672d90, mPort=..., params=0x7fffffffc940) at OcpiContainerPort.cxx:83
#2 0x00007ffff7760110 in OCPI::Container::PortData::PortData (this=0x672d90,
mPort=..., isProvider=false, xferOptions=0, params=0x7fffffffc940) at
OcpiContainerPort.cxx:60
#3 0x00007ffff77601f2 in OCPI::Container::BasicPort::BasicPort (this=0x672d90,
metaData=..., isProvider=false, options=0, params=0x7fffffffc940) at
OcpiContainerPort.cxx:103
#4 0x00007ffff7760304 in OCPI::Container::ExternalPort::ExternalPort
(this=0x672d90, metaPort=..., isProvider=false, params=0x7fffffffc940) at
OcpiContainerPort.cxx:398
#5 0x000000000043d6dd in OCPI::Container::ExternalPortBase<OCPI::HDL::Port,
OCPI::HDL::ExternalPort>::ExternalPortBase (this=0x672d60, port=..., name=0x444ead
"w0out", props=0x7fffffffc940, metaPort=..., isProvider=false) at
../.././../../../core/container/interfaces/api/include/OcpiContainerManager.h:205
#6 0x000000000043d7af in OCPI::HDL::ExternalPort::ExternalPort (this=0x672d60, port=...,
name=0x444ead "w0out", isProvider=false, props=0x7fffffffc940) at
HdlContainer.cxx:1141
#7 0x000000000043154f in OCPI::HDL::Port::connectExternal (this=0x66ff60,
extName=0x444ead "w0out", userProps=0x7fffffffc940, props=0x7fffffffc8e0) at
HdlContainer.cxx:1463
#8 0x000000000043137f in covariant return thunk to
OCPI::HDL::Port::connectExternal(char const*, OCPI::API::PValue const*,
OCPI::API::PValue const*) () at HdlContainer.cxx:1469
#9 0x000000000042926a in main (argc=18, argv=0x7fffffffd1e8) at
testRpl_main.cxx:550
this seems to stem from&w1in.connectExternal() attempting to setup or
validate port p01 in testRpl_main.cxx:
acquire ? 0 :&w1in.connectExternal("w0out", p01, p10);
since i am not an acquire device, my p01 isnt setup. if i attempt to
configure it with -r0o nothing is acceptable and it complains passive,
active, whatever not being valid for the message port (w0out in this
case).
secondly, it seems that the testbias design fails to meeting timing.
it says:
Timing errors: 146 Score: 31023 (Setup/Max: 31014, Hold: 9)
Constraints cover 4897972 paths, 0 nets, and 118758 connections
Design statistics:
Minimum period: 7.980ns{1} (Maximum frequency: 125.313MHz)
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