Hi Troy,
Just to be clear, there is no requirement to use BSV to use OpenCPI.
The issue is that much of the infrastructure IP is written in BSV, from
which verilog is generated.
The only BSV dependency is when those particular infrastructure elements
need to be modified, in which case
BSV is obviously preferable to painfully modifying the generated verilog.
Any application IP (workers) has no dependency on BSV, and the
underlying device-related cores don't either.
Essentially the BSV origin of those infrastructure IPs makes them
specifically more expensive to modify
(or rewrite). Most OpenCPI FPGA users have not had this issue. Some
are academic in which case the
BSV license is "free", and others do not need to modify those IPs, or
for minor fixes, Shep or others with BSV licenses usually
provides fixes along with new verilog for anyone to compile for any
platform.
The BSV situation has been a tradeoff between the large producitivity
gains for those with licenses, vs. the "sharability" of the resulting
verilog when the recipients need to modify it and do not already have
financial justification for a BSV license. It isn't a perfect
situation, and we have tried to get an "opencpi site license" funded,
but it has not happened yet. BSV is mostly used for ASICs and is indeed
priced out of the market for most FPGA development. We may have to
replace some of the BSV-originated IPs with original verilog work-alikes
for those that are likely to require user modifications/customizations.
Jim
On 12/18/11 6:27 PM, Ziersch, Troy (Contractor) wrote:
*UNCLASSIFIED*
Hi Shep,
Thanks for the info. I'm sure I will have plenty of questions once the
FPGA cards arrive and we have the openCPI demos running.
Is it going to be possible for us to get openCPI working with our
various platforms/FMCs without a BlueSpec compiler?
We've been quoted a high price, compared to the rest of the reference
platform, for a not for profit BlueSpec licence.
The cost of BlueSpec and it being sole source are probably our biggest
concerns when considering if we should adopt OpenCPI as our middleware.
The cost of a full BlueSpec license may also be a barrier for FPGA
Card and FMC OEMs supporting openCPI by developing their own board
support packages.
Cheers,
Troy
*IMPORTANT*: This email remains the property of the Department of
Defence and is subject to the jurisdiction of section 70 of the Crimes
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------------------------------------------------------------------------
*From:* Shepard Siegel [mailto:[email protected]]
*Sent:* Saturday, 17 December 2011 9:22 AM
*To:* Ziersch, Troy (Contractor)
*Cc:* [email protected]; David Wright
*Subject:* Re: [opencpi_dev] Possible OpenCPI based project
[SEC=UNCLASSIFIED]
Hi Troy,
I see no showstoppers in your platform description; but at the same
time there are some non-trivial integration tasks. For example, our
firm owns a 4DSP FMC150, but we have yet to port the existing opencpi
device workers to the ML605. The ML605 is a fine, stable platform; and
we have had few issues with it over the years. Specifically with
regard to LVDS ADC/DAC integration remains porting the IOSERDES logic
from V5 to V6. It may or may not be trivial. Examples from V5 are
given here:
https://github.com/opencpi/opencpi/blob/master/hdl/primitives/util_virtex5/imports/ddrInput2.v
https://github.com/opencpi/opencpi/blob/master/hdl/primitives/util_virtex5/imports/ddrOutput2.v
We can volley emails if you have more questions.
Best,
Shep
On Thu, Dec 8, 2011 at 12:39 AM, Ziersch, Troy (Contractor)
<[email protected]
<mailto:[email protected]>> wrote:
UNCLASSIFIED
Hi,
The team I am part of is currently researching the possibly of a
standard signal processing development platform for a government
research department.
An initial review of your documents has shown that OpenCPI seems
to meet
our requirements for a middleware.
The platforms we are targeting are your i7/ML605 reference
platform for
development and a uTCA platform for field trials.
The field trial platform will consist of the follow or similar:
- i7 quad core CPU, 8G RAM, PCIe Gen II x8 :
http://www.gocct.com/sheets/AM/am31xx0x.htm
- Xilinx V6 FPGA AMC, PCIe Gen II x8 :
http://www.lyrtech.com/products/perseus_601x.php
- One of these FMC
o 8 x 250 Msam/sec ADC :
http://www.4dsp.com/FMC108.php
o 4/2/1 x 1.25/2.5/5 Gsam/sec ADC :
http://www.4dsp.com/FMC125.php
o 2 x 1 Gsam ADC, 2 x 1 Gsam DAC :
http://www.4dsp.com/FMC110.php
o RF Transceiver :
http://www.lyrtech.com/products/radio420x.php
Or preference for time synchronisation is Precision Time Protocol
(IEEE
1588) for CPUs and 10MHz/PPS for FPGAs provided by the following or
similar:
- Meinberg LANTIME PTP
- http://www.meinberg.de/english/products/lantime-m600-mrs-ptpv2.htm
The use of PTP requires a recent version of the Linux kernel and we
prefer a distribution which has all pre-requisites available as
packages. Thus our preferred Linux distribution is Ubuntu 10.11.
It appears that Ubuntu and PCIe Gen II x8 are not currently
supported by
OpenCPI.
So some initial questions we have are:
- When is the next stable release due?
- How much of the specification documents will be implemented
for the
next release?
- Are there any technical issues when selecting a platform that we
need to be aware of?
- How trivial is it to update OpenCPI to support the field trial
platform?
- Is there a roadmap available for platform support (OS, FPGA cards,
FMC cards, Fabrics)?
- The bug tracking tool at opencpi.org <http://opencpi.org>
seems unused, is there an
alternative being used?
- The forum at opencpi.prg appears to be broken
Any help will be much appreciated.
Cheers,
Troy
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and is subject to the jurisdiction of section 70 of the Crimes Act
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