Hi Troy,

This has been fixed.
The problem was actually that errors in all properties in the top level of a spec file were ignored.

We have also just checked in significant fixes for multi-worker FPGA bitstreams, proper handling of connectivity constraints in bitstreams, and automatic bitstream loading (which requires a config file to map
the jtag pod serial number to the PCI device ID).

Thus your submitted patch (thanks again) has made it to the front of the queue!

Cheers,

Jim




On 4/23/12 12:21 AM, Ziersch, Troy (Contractor) wrote:

*UNCLASSIFIED*

Hi,
I've realised that the problem was that I used type="Boolean" instead of type="Bool".
Addresses in xxx_impl.vh are fine with type="Bool"
Thus the bug is really that the invalid type "Boolean" was not picked up as an error.
Cheers,
Troy

------------------------------------------------------------------------
*From:* Ziersch, Troy (Contractor)
*Sent:* Monday, 23 April 2012 1:32 PM
*To:* [email protected]
*Subject:* Bug: Boolean address always zero in xxx_impl.vh [SEC=UNCLASSIFIED]

*UNCLASSIFIED*

Hi,
I have a xxx_spec.xml which has several boolean properties scattered through it. All of these boolean properties have an address of zero defined in gen/xxx_impl.vh Changing Boolean to UChar results in sensible addresses for the properties.
Cheers,
Troy

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