From: Alexander Kanavin <[email protected]> This was overlooked in https://lists.openembedded.org/g/openembedded-core/message/218953
and caused non-reusable sstate for rust-native when the target is one of risc-v machines. [YOCTO #16132] Signed-off-by: Alexander Kanavin <[email protected]> --- meta/classes-recipe/rust-target-config.bbclass | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meta/classes-recipe/rust-target-config.bbclass b/meta/classes-recipe/rust-target-config.bbclass index 2a06c4ae8b..8e737c1451 100644 --- a/meta/classes-recipe/rust-target-config.bbclass +++ b/meta/classes-recipe/rust-target-config.bbclass @@ -433,7 +433,7 @@ def rust_gen_target(d, thing, wd, arch): json.dump(tspec, f, indent=4) # These are accounted for in tmpdir path names so don't need to be in the task sig -rust_gen_target[vardepsexclude] += "ABIEXTENSION llvm_cpu" +rust_gen_target[vardepsexclude] += "ABIEXTENSION llvm_cpu TUNE_RISCV_ABI" do_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES" -- 2.47.3
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