On (11/02/11 16:15), Paul Menzel wrote:
> Am Montag, den 20.12.2010, 10:39 -0800 schrieb Khem Raj:
> > On Mon, Dec 20, 2010 at 7:42 AM, Paul Menzel wrote:
> > > Am Samstag, den 18.12.2010, 22:46 -0800 schrieb Khem Raj:
> > >> On Sat, Dec 18, 2010 at 2:24 AM, Eric Bénard <[email protected]> wrote:
> > >
> > >> > On 18/12/2010 11:10, Paul Menzel wrote:
> > >> >>
> > >> >> Error: selected processor does not support ARM mode `smc #0'
> > >> >
> > >> > this seems to be a known problem with gcc 4.5 :
> > >> > https://bugs.launchpad.net/ubuntu/+source/gcc-4.5/+bug/669912
> > >>
> > >> Its not a gcc problem to clarify. Its just that older compilers did
> > >> not differentiate security extentions presence.
> > >> http://kernel.ubuntu.com/git?p=ubuntu/ubuntu-natty.git;a=commitdiff;h=1ebe13dea156358f1044a7a755f02945ad3890e4;hp=f31ff7673ef77d04e74e1a1e45bb2940781f35f0
> > >>
> > >> http://kernel.ubuntu.com/git?p=ubuntu/ubuntu-natty.git;a=commitdiff;h=99340d7b23f3df75d9b752fb25088a10064cd0a6;hp=9523bd6810e0229a8147e8c3d6498e2f40b38974
> > >>
> > >> are the fixes you should apply to kernel.
> > >
> > > I just wanted to add that `linux-omap-psp_2.6.32` builds fine with
> > > `angstrom-2010.x` (without the above mentioned patches) which uses the
> > > following toolchain.
> > >
> > > conf/distro/angstrom-2010.x.conf:ANGSTROM_GCC_VERSION
> > > ?= "4.5"
> > > conf/distro/angstrom-2010.x.conf:ANGSTROM_BINUTILS_VERSION
> > > ?= "2.20.1"
> >
> > yes it will work with binutils < 2.21 the patch I previously implied
> > is in assembler.
>
> Víctor committed these patches in 4f24435f [1] for
> `linux-omap4_2.6.35.3.bb`. I tried to backport these patches to
> `linux-omap-psp_2.6.32.bb` but I am not successful. A lot seems to have
> changed between Linux 2.6.32 and 2.6.35.
>
> After the adaptations to `arch/arm/mach-omap2/Makefile` I am now getting
> the next error message.
>
> | LDS arch/arm/kernel/vmlinux.lds
> | /tmp/ccpCEAjJ.s: Assembler messages:
> | /tmp/ccpCEAjJ.s:306: Error: selected processor does not support ARM
> mode `smc #0'
> | /tmp/ccpCEAjJ.s:346: Error: selected processor does not support ARM
> mode `smc #0'
>
> But I do not know how to adapt that. Is there an easier way to configure
> these security extensions?
yes there are cases where its used in inline assembly and compiler does not
have knob for security extentions. Here is one patch that will work with
binutils >= 2.21 but be away that it will NOT work with older binutils and
infact will render kernel uncompilable if you are not using binutils
atleast at version 2.21
Enjoy
-Khem
Compiling with binutils 2.21 needs to have this sec arch_extention
gcc does not know march=armv7-a+sec and if we use -Wa,-march=armv7-a+sec
then assembler does not honor it because march=armv7-a when specfied to
gcc driver adds march=armv7-a *before* -Wa,-march=armv7-a+sec when calling
assembler. There is no way getting around that :(
So what do we do ? We take the fight to the beast
We add the .arch_extention where its added in inline
assembly.
This file is added by one of local OE patches these patches are not
(upstream _yet_ or discarded) dont know
-Khem
Index: git/arch/arm/kernel/sysfs_v7.c
===================================================================
--- git.orig/arch/arm/kernel/sysfs_v7.c
+++ git/arch/arm/kernel/sysfs_v7.c
@@ -76,7 +76,8 @@ static ssize_t aux_ctl_store(struct sys_
asm ("mrc p15, 0, %0, c1, c0, 1" : "=r"(val));
SETBITS(val, 0xff8, new);
val &= ~2;
- asm ("mov r0, %0 \n\t"
+ asm (".arch_extension sec\n\t"
+ "mov r0, %0 \n\t"
"mov r12, #3 \n\t"
"smc #0 \n\t"
:: "r"(val) : "r0", "r12");
@@ -107,7 +108,8 @@ static ssize_t l2_aux_ctl_store(struct s
asm ("mrc p15, 1, %0, c9, c0, 2" : "=r"(val));
SETBITS(val, 0xbc00000, new);
- asm ("mov r0, %0 \n\t"
+ asm (".arch_extension sec\n\t"
+ "mov r0, %0 \n\t"
"mov r12, #2 \n\t"
"smc #0 \n\t"
:: "r"(val) : "r0", "r12");
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