At 03:23 PM 8/25/2006, Greg Lindahl wrote: >On Fri, Aug 25, 2006 at 03:21:20PM -0400, [EMAIL PROTECTED] wrote: > >> I presume you meant invalidate the cache, not flush it, before >accessing DMA'ed >> data. > >Yes, this is what I meant. Sorry!
Flush (sync for_device) before posting. Invalidate (sync for_cpu) before processing. On some architectures, these operations flush and/or invalidate i/o pipeline caches as well. As they should. Tom. _______________________________________________ openib-general mailing list openib-general@openib.org http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
