Quoting r. Jason Gunthorpe <[EMAIL PROTECTED]>: > After thinking about it some more, there are more cases in the kernel > than just the one in mthca. For instance there are paths in the pci > core than manipulate BAR registers without a barrier. It would be bad > to change a bar via config write and issue a MMIO operation to the new > address without waiting for the split to return. I also know of a > fibre channel chip that has a similar strong requirement of order in > the reset sequence like mthca.
Interesting. So maybe pci config access commands should include the barrier instead of sticking these things in mthca? -- MST _______________________________________________ openib-general mailing list openib-general@openib.org http://openib.org/mailman/listinfo/openib-general To unsubscribe, please visit http://openib.org/mailman/listinfo/openib-general
