From what I recall, nested virtualization might require BIOS changes (at least on DELL). Good luck!
----lfe...@yahoo.com, Portsmouth VA, 23701 Solaris/LINUX/Windows administration CISSP/Security consulting On Thursday, April 1, 2021, 07:16:20 AM EDT, russell <str...@willows7.myzen.co.uk> wrote: Hi For what I have read VirtualBox 6.1 introduced the capability to have nested VMs. I have created a VM to run VMware 6.7.0u3, however when I attempt to start any VM inside ESX 6.7.0u3 I get the following message Failed to power on virtual machine Lethe. This host does not support "AMD RVI" hardware assisted MMU virtualization. Click here for more details. <https://172.16.26.25/ui/#/host/vms/1/monitor/tasks/haTask-1-vim.VirtualMachine.powerOn-646279618> - Looking at the log for the VBox VM 00:00:00.812397 Ext Name: AuthenticAMD 00:00:00.812398 Ext Supports: 0x80000000-0x8000001e 00:00:00.812398 Family: 15 Extended: 10 Effective: 25 00:00:00.812398 Model: 1 Extended: 2 Effective: 33 00:00:00.812399 Stepping: 0 00:00:00.812399 Brand ID: 0x000 00:00:00.812399 Ext Features 00:00:00.812399 Mnemonic - Description = guest (host) 00:00:00.812400 FPU - x87 FPU on Chip = 1 (1) 00:00:00.812400 VME - *Virtual 8086 Mode Enhancements* = 1 (1) 00:00:00.812401 DE - Debugging extensions = 1 (1) 00:00:00.812401 PSE - Page Size Extension = 1 (1) 00:00:00.812402 TSC - Time Stamp Counter = 1 (1) 00:00:00.812403 MSR - K86 Model Specific Registers = 1 (1) 00:00:00.812403 PAE - Physical Address Extension = 1 (1) 00:00:00.812404 MCE - Machine Check Exception = 0 (1) 00:00:00.812404 CX8 - CMPXCHG8B instruction = 1 (1) 00:00:00.812405 APIC - APIC On-Chip = 1 (1) 00:00:00.812405 SEP - SYSCALL/SYSRET = 1 (1) 00:00:00.812406 MTRR - Memory Type Range Registers = 1 (1) 00:00:00.812406 PGE - PTE Global Bit = 1 (1) 00:00:00.812407 MCA - Machine Check Architecture = 1 (1) 00:00:00.812407 CMOV - Conditional Move instructions = 1 (1) 00:00:00.812408 PAT - Page Attribute Table = 1 (1) 00:00:00.812408 PSE-36 - 36-bit Page Size Extension = 1 (1) 00:00:00.812409 NX - No-Execute/Execute-Disable = 1 (1) 00:00:00.812409 AXMMX - AMD Extensions to MMX instructions = 1 (1) 00:00:00.812410 MMX - Intel MMX Technology = 1 (1) 00:00:00.812410 FXSR - FXSAVE and FXRSTOR Instructions = 1 (1) 00:00:00.812411 FFXSR - AMD fast FXSAVE and FXRSTOR instructions = 1 (1) 00:00:00.812411 Page1GB - 1 GB large page = 0 (1) 00:00:00.812412 RDTSCP - RDTSCP instruction = 1 (1) 00:00:00.812413 LM - AMD64 Long Mode = 1 (1) 00:00:00.812413 3DNOWEXT - AMD Extensions to 3DNow = 0 (0) 00:00:00.812414 3DNOW - AMD 3DNow = 0 (0) 00:00:00.812415 LahfSahf - LAHF/SAHF support in 64-bit mode = 1 (1) 00:00:00.812415 CmpLegacy - Core multi-processing legacy mode = 1 (1) 00:00:00.812416 *SVM - AMD Secure Virtual Machine extensions* = 1 (1) 00:00:00.812416 EXTAPIC - AMD Extended APIC registers = 0 (1) 00:00:00.812417 CR8L - AMD LOCK MOV CR0 means MOV CR8 = 1 (1) 00:00:00.812417 ABM - AMD Advanced Bit Manipulation = 1 (1) 00:00:00.812418 SSE4A - SSE4A instructions = 1 (1) 00:00:00.812418 MISALIGNSSE - AMD Misaligned SSE mode = 1 (1) 00:00:00.812419 3DNOWPRF - AMD PREFETCH and PREFETCHW instructions = 1 (1) 00:00:00.812419 OSVW - AMD OS Visible Workaround = 0 (1) 00:00:00.812420 IBS - Instruct Based Sampling = 0 (1) 00:00:00.812420 XOP - Extended Operation support = 0 (0) 00:00:00.812421 SKINIT - SKINIT, STGI, and DEV support = 0 (1) 00:00:00.812421 WDT - AMD Watchdog Timer support = 0 (1) 00:00:00.812422 LWP - Lightweight Profiling support = 0 (0) 00:00:00.812422 FMA4 - Four operand FMA instruction support = 0 (0) 00:00:00.812423 17 - Reserved = 0 (1) 00:00:00.812423 NodeId - NodeId in MSR C001_100C = 0 (0) 00:00:00.812424 TBM - Trailing Bit Manipulation instructions = 0 (0) 00:00:00.812424 TOPOEXT - Topology Extensions = 0 (1) 00:00:00.812425 PRFEXTCORE - Performance Counter Extensions support = 0 (1) 00:00:00.812425 PRFEXTNB - NB Performance Counter Extensions support = 0 (1) 00:00:00.812426 DATABPEXT - Data-access Breakpoint Extension = 0 (1) 00:00:00.812426 PERFTSC - Performance Time Stamp Counter = 0 (0) 00:00:00.812427 PCX_L2I - L2I/L3 Performance Counter Extensions = 0 (1) 00:00:00.812427 MWAITX - MWAITX and MONITORX instructions = 0 (1) 00:00:00.812427 30 - Reserved = 0 (1) 00:00:00.812428*SVM Feature Identification (leaf A):* 00:00:00.812429 *NP - Nested Paging* = 0 (1) 00:00:00.812429 LbrVirt - Last Branch Record Virtualization = 0 (1) 00:00:00.812430 SVML - SVM Lock = 0 (1) 00:00:00.812430 NRIPS - NextRIP Save = 1 (1) 00:00:00.812431 TscRateMsr - MSR based TSC rate control = 0 (1) 00:00:00.812432 VmcbClean - VMCB clean bits = 0 (1) 00:00:00.812432 FlushByASID - Flush by ASID = 1 (1) 00:00:00.812433 DecodeAssists - Decode Assists = 1 (1) 00:00:00.812433 PauseFilter - Pause intercept filter = 0 (1) 00:00:00.812434 11 - Reserved = 0 (1) 00:00:00.812434 PauseFilterThreshold - Pause filter threshold = 0 (1) 00:00:00.812435 AVIC - Advanced Virtual Interrupt Controller = 0 (1) 00:00:00.812435 VMSAVEVirt - VMSAVE and VMLOAD Virtualization = 0 (1) 00:00:00.812436 VGIF - Virtual Global-Interrupt Flag = 0 (1) 00:00:00.812436 GMET - Guest Mode Execute Trap Extension = 0 (1) 00:00:00.812437 19 - Reserved = 0 (1) 00:00:00.812437 20 - Reserved = 0 (1) 00:00:00.812438 28 - Reserved = 0 (1) 00:00:00.812439 Full Name: "AMD Ryzen 5 5600X 6-Core Processor " 00:00:00.812439 TLB 2/4M Instr/Uni: fully 64 entries 00:00:00.812439 TLB 2/4M Data: fully 64 entries 00:00:00.812440 TLB 4K Instr/Uni: fully 64 entries 00:00:00.812440 TLB 4K Data: fully 64 entries 00:00:00.812440 L1 Instr Cache Line Size: 64 bytes 00:00:00.812440 L1 Instr Cache Lines Per Tag: 1 00:00:00.812441 L1 Instr Cache Associativity: 8 way 00:00:00.812441 L1 Instr Cache Size: 32 KB 00:00:00.812441 L1 Data Cache Line Size: 64 bytes 00:00:00.812441 L1 Data Cache Lines Per Tag: 1 00:00:00.812442 L1 Data Cache Associativity: 8 way 00:00:00.812442 L1 Data Cache Size: 32 KB 00:00:00.812443 L2 TLB 2/4M Instr/Uni: 2 way 512 entries 00:00:00.812443 L2 TLB 2/4M Data: 4 way 2048 entries 00:00:00.812443 L2 TLB 4K Instr/Uni: 4 way 512 entries 00:00:00.812444 L2 TLB 4K Data: 8 way 2048 entries 00:00:00.812444 L2 Cache Line Size: 64 bytes 00:00:00.812444 L2 Cache Lines Per Tag: 1 00:00:00.812444 L2 Cache Associativity: res9 00:00:00.812444 L2 Cache Size: 256 KB 00:00:00.812445 TS - Temperature Sensor = 0 (1) 00:00:00.812446 FID - Frequency ID control = 0 (0) 00:00:00.812446 VID - Voltage ID control = 0 (0) 00:00:00.812447 TTP - Thermal Trip = 0 (1) 00:00:00.812448 TM - Hardware Thermal Control (HTC) = 0 (1) 00:00:00.812448 100MHzSteps - 100 MHz Multiplier control = 0 (0) 00:00:00.812449 HwPstate - Hardware P-state control = 0 (1) 00:00:00.812449 TscInvariant - Invariant Time Stamp Counter = 1 (1) 00:00:00.812450 CBP - Core Performance Boost = 0 (1) 00:00:00.812450 EffFreqRO - Read-only Effective Frequency Interface = 0 (1) 00:00:00.812451 ProcFdbkIf - Processor Feedback Interface = 0 (0) 00:00:00.812451 ProcPwrRep - Core power reporting interface support = 0 (0) 00:00:00.812452 13 - Reserved = 0 (1) 00:00:00.812452 14 - Reserved = 0 (1) 00:00:00.812453 CLZERO - Clear zero instruction (cacheline) = 0 (1) 00:00:00.812454 IRPerf - Instructions retired count support = 0 (1) 00:00:00.812454 XSaveErPtr - Save/restore error pointers (FXSAVE/RSTOR*) = 0 (1) 00:00:00.812455 RDPRU - RDPRU instruction = 0 (1) 00:00:00.812455 6 - Reserved = 0 (1) 00:00:00.812456 MCOMMIT - MCOMMIT instruction = 0 (0) 00:00:00.812456 9 - Reserved = 0 (1) 00:00:00.812457 10 - Reserved = 0 (1) 00:00:00.812458 IBPB - Supports the IBPB command in IA32_PRED_CMD = 0 (1) 00:00:00.812458 13 - Reserved = 0 (1) 00:00:00.812459 14 - Reserved = 0 (1) 00:00:00.812459 15 - Reserved = 0 (1) 00:00:00.812460 17 - Reserved = 0 (1) 00:00:00.812460 18 - Reserved = 0 (1) 00:00:00.812461 19 - Reserved = 0 (1) 00:00:00.812462 20 - Reserved = 0 (1) 00:00:00.812462 24 - Reserved = 0 (1) 00:00:00.812463 28 - Reserved = 0 (1) 00:00:00.812463 Physical Address Width: 48 bits 00:00:00.812464 Virtual Address Width: 48 bits 00:00:00.812464 Guest Physical Address Width: 0 bits 00:00:00.812464 Physical Core Count: 2 So it looks as if the CPU has Secure Virtual Machine extensions enable and Nested Pages enable, can these be exposed to VMware so that the Nested Paging is exposed in the VM to the ESX server? Regards Russell _______________________________________________ openindiana-discuss mailing list openindiana-discuss@openindiana.org https://openindiana.org/mailman/listinfo/openindiana-discuss _______________________________________________ openindiana-discuss mailing list openindiana-discuss@openindiana.org https://openindiana.org/mailman/listinfo/openindiana-discuss