Ben Dooks wrote:
> Could you post disassembly of these functions to show if there is anything
> else we can do for this please.
Here we go, with unnecessary labels and such trimmed:
s3c2440_nand_write_buf:
mov ip, sp
stmfd sp!, {r4, r5, r6, fp, ip, lr, pc}
sub fp, ip, #4
sub sp, sp, #4
ldr r6, [r0, #168]
mov r5, r2
ldr r0, [r6, #4]
mov r2, r2, asr #2
mov r4, r1
bl __raw_writesl
bic r1, r5, #3
add r4, r4, r1
b .L60
.L61:
ldr r2, [r6, #4]
ldrb r3, [r4], #1 @ zero_extendqisi2
strb r3, [r2, #0]
.L60:
cmp r1, r5
add r1, r1, #1
bne .L61
ldmfd sp, {r3, r4, r5, r6, fp, sp, pc}
s3c2440_nand_read_buf:
mov ip, sp
stmfd sp!, {r4, r5, r6, fp, ip, lr, pc}
sub fp, ip, #4
sub sp, sp, #4
ldr r6, [r0, #168]
mov r5, r2
ldr r0, [r6, #0]
mov r2, r2, asr #2
mov r4, r1
bl __raw_readsl
bic r2, r5, #3
add r4, r4, r2
b .L65
.L66:
ldr r3, [r6, #0]
ldrb r3, [r3, #0] @ zero_extendqisi2
strb r3, [r4], #1
.L65:
cmp r2, r5
add r2, r2, #1
bne .L66
ldmfd sp, {r3, r4, r5, r6, fp, sp, pc}
There's a trivial optimization that GCC seems to miss in both functions,
namely moving the byte increment before the jump back to the top of the
loop, but I don't know if there's anything we can do about this.
- Werner
