The same DMA registers are used for S3C2440 and S3C2442 CPUs, so we also need to define the registers for S3C2442.
Signed-off-by: Sven Rebhan <[email protected]> diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h index 3bc0a21..cbbe3f2 100644 --- a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h +++ b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h @@ -73,7 +73,7 @@ #define S3C2410_DCON_NORELOAD (1<<22) #define S3C2410_DCON_HWTRIG (1<<23) -#ifdef CONFIG_CPU_S3C2440 +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) #define S3C2440_DIDSTC_CHKINT (1<<2) #define S3C2440_DCON_CH0_I2SSDO (5<<24) -- 1.6.0.6
