This patch allows setting of BBT usage from machine definition file. Andy adapted Harald's original patch slightly to use the bitfield style in s3c2410_nand_set that is already in use there.
Note: ":" Cleanups added by Nelson, checkpatch was complaining. CC: Ben Dooks <[email protected]> Signed-off-by: Andy Green <[email protected]> Signed-off-by: Nelson Castillo <[email protected]> --- arch/arm/plat-s3c/include/plat/nand.h | 5 +++-- drivers/mtd/nand/s3c2410.c | 3 +++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h index f4dcd14..70e1a72 100644 --- a/arch/arm/plat-s3c/include/plat/nand.h +++ b/arch/arm/plat-s3c/include/plat/nand.h @@ -22,7 +22,8 @@ */ struct s3c2410_nand_set { - unsigned int disable_ecc : 1; + unsigned int disable_ecc:1; + unsigned int use_bbt:1; int nr_chips; int nr_partitions; @@ -39,7 +40,7 @@ struct s3c2410_platform_nand { int twrph0; /* active time for nWE/nOE */ int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */ - unsigned int ignore_unset_ecc : 1; + unsigned int ignore_unset_ecc:1; int nr_sets; struct s3c2410_nand_set *sets; diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 8e375d5..5f3c5d5 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c @@ -687,6 +687,9 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, chip->options = 0; chip->controller = &info->controller; + if (set->use_bbt) + chip->options |= NAND_USE_FLASH_BBT; + switch (info->cpu_type) { case TYPE_S3C2410: chip->IO_ADDR_W = regs + S3C2410_NFDATA;
