This is an automated email from Gerrit.

Hsiangkai Wang ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/1275

-- gerrit

commit e8aae602068e808b423242a19529150acb4bac22
Author: Hsiangkai <[email protected]>
Date:   Mon Mar 11 16:28:15 2013 +0800

    nds32: N9/N10 support ir8, idr0, and idr1 registers
    
    Currently, if registers are not enabled, NDS32 will block the registers
    access and return NDS32_REGISTER_DISABLE to clients.
    
    Actually, N9/N10 could access ir8, idr0, and idr1, so NDS32 should
    enable them as config target.
    
    Change-Id: I6e81a5226452ce0fd626b3d5559bbbb95c7d603f
    Signed-off-by: Hsiangkai Wang <[email protected]>

diff --git a/src/target/nds32.c b/src/target/nds32.c
index 948916f..cde1c78 100644
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -1043,7 +1043,9 @@ static int nds32_init_option_registers(struct nds32 
*nds32)
                        ((struct nds32_reg 
*)reg_cache->reg_list[IR7].arch_info)->enable = true;
        }
 
-       if ((cpu_version->cpu_id_family == 0xA) || (cpu_version->cpu_id_family 
== 0xC) ||
+       if ((cpu_version->cpu_id_family == 0x9) ||
+                       (cpu_version->cpu_id_family == 0xA) ||
+                       (cpu_version->cpu_id_family == 0xC) ||
                        (cpu_version->cpu_id_family == 0xD))
                ((struct nds32_reg 
*)reg_cache->reg_list[IR8].arch_info)->enable = true;
 
@@ -1209,11 +1211,16 @@ static int nds32_init_option_registers(struct nds32 
*nds32)
                }
        }
 
-       if (cpu_version->cpu_id_family == 0xC) {
-               if (cpu_version->revision != 0x0C)
-                       ((struct nds32_reg 
*)reg_cache->reg_list[IDR0].arch_info)->enable = true;
+       if ((cpu_version->cpu_id_family == 0x9) ||
+                       (cpu_version->cpu_id_family == 0xA) ||
+                       (cpu_version->cpu_id_family == 0xC) ||
+                       (cpu_version->cpu_id_family == 0xD)) {
 
+               ((struct nds32_reg 
*)reg_cache->reg_list[IDR0].arch_info)->enable = true;
                ((struct nds32_reg 
*)reg_cache->reg_list[IDR1].arch_info)->enable = true;
+
+               if ((cpu_version->cpu_id_family == 0xC) && 
(cpu_version->revision == 0x0C))
+                       ((struct nds32_reg 
*)reg_cache->reg_list[IDR0].arch_info)->enable = false;
        }
 
        return ERROR_OK;

-- 

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