This is an automated email from Gerrit.
Angus Gratton (g...@projectgus.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/1967
-- gerrit
commit 04a85be24586f58adc6d6dc36487c0578c83be97
Author: Angus Gratton <g...@projectgus.com>
Date: Thu Feb 20 21:31:01 2014 +1100
AT91SAM4L: Support 'reset init'
'init' brings up the 80MHz RC80M oscillator, switches CPU & peripheral
buses to 40MHz.
Is relatively busy because changing clock sources on SAM4L requires a
few stages, no simple alternatives I could find unless you can
guarantee a crystal is present.
Tested on a ft2232 based JTAG adapter (Olimex ARM-USB-TINY-H.) I don't
have a CMSIS-DAP adapter to test with (this is what the original SAM4L
support used.)
Change-Id: Id36bcc7740e1505ebe227681fe57e7b22dfdbef0
Signed-off-by: Angus Gratton <g...@projectgus.com>
diff --git a/tcl/target/at91sam4lXX.cfg b/tcl/target/at91sam4lXX.cfg
index 16fb1ef..99c67fa 100644
--- a/tcl/target/at91sam4lXX.cfg
+++ b/tcl/target/at91sam4lXX.cfg
@@ -8,9 +8,20 @@ set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME
$_TARGETNAME configure -event reset-deassert-post at91sam4l_reset_deassert_post
+$_TARGETNAME configure -event reset-init at91sam4l_reset_init
+
+
+# JTAG clock speeds - you can override these variables in your own
+# config file if these don't work for you
+
+# SLOWSPEED JTAG clock applies for running on 115kHz RCLOCAL
+set _SLOWSPEED 15
+# _MAXSPEED JTAG clock applies for running on 40MHz derived from RC80M, or
similar
+set _MAXSPEED 5000
proc init_reset { mode } {
- jtag arp_init-reset
+ global using_jtag
+ if {$using_jtag} { jtag arp_init-reset; }
# Before we exit reset, we need to know whether we're coming out to run or
to halt
#
# Can't access it from the reset-deassert-post, so we store it in
@@ -23,6 +34,10 @@ proc init_reset { mode } {
if { 0 == [string compare $mode init] } {
set at91sam4l_pending_halt 1;
}
+
+ # slow the adapter down, as post-reset will be RCLOCAL
+ global _SLOWSPEED
+ adapter_khz $_SLOWSPEED
}
# SAM4L SMAP will hold the CPU in reset if TCK is low when nRESET
@@ -55,8 +70,57 @@ proc at91sam4l_reset_deassert_post {} {
mww $ADDR_SMAP_SCR $BIT_HCR
}
+# Reset comes up at 115kHz RCLOCAL, so switch to RC80M during init
+proc at91sam4l_reset_init {} {
+ echo "ATSAM4L: Switching to RC80M for 40MHz cpu/peripheral clock"
+
+ # Registers we need
+ set ADDR_SCIF_BASE 0x400E0800
+ set OFFS_SCIF_UNLOCK 0x0018
+ set OFFS_RC80MCR 0x50
+ set BIT_RC80MCR_EN [expr 1 << 0]
+
+ set ADDR_PM_BASE 0x400E0000
+ set OFFS_MCCTRL 0x00
+ set MASK_MCCTRL_RC80M 0x04
+ set OFFS_SR 0xD4
+ set BIT_CKRDY [expr 1 << 5]
+ set OFFS_PM_UNLOCK 0x0058
+ set OFFS_CPUSEL 0x04
+ set OFFS_PBASEL 0x0C
+ set OFFS_PBBSEL 0x10
+ set OFFS_PBCSEL 0x14
+ set OFFS_PBDSEL 0x18
+ set BIT_SEL_DIV [expr 1 << 7]
+ set UNLOCK_KEY [expr 0xAA << 8]
+
+ # enable RC80M clock
+ mww [expr $ADDR_SCIF_BASE + $OFFS_SCIF_UNLOCK] [expr $UNLOCK_KEY +
$OFFS_RC80MCR]
+ mww [expr $ADDR_SCIF_BASE + $OFFS_RC80MCR] $BIT_RC80MCR_EN
+ while {[expr [mrw [expr $ADDR_SCIF_BASE + $OFFS_RC80MCR]] &
$BIT_RC80MCR_EN] == 0} { sleep 1 }
+
+ # as soon as we set CPUSEL to /2 we'll need a matching
+ # a 2x slower JTAG speed
+ global _SLOWSPEED
+ adapter_khz [expr $_SLOWSPEED / 2]
+
+ # set all main clock dividers to /2
+ foreach offs { $OFFS_CPUSEL $OFFS_PBASEL $OFFS_PBBSEL $OFFS_PBCSEL
$OFFS_PBDSEL } {
+ mww [expr $ADDR_PM_BASE + $OFFS_PM_UNLOCK] [expr $UNLOCK_KEY + $offs]
+ mww [expr $ADDR_PM_BASE + $offs] [expr $BIT_SEL_DIV ]
+ while {[expr [mrw [expr $ADDR_PM_BASE + $OFFS_SR]] & $BIT_CKRDY] == 0}
{ sleep 1 }
+ }
+
+ # switch main clock source to RC80M
+ mww [expr $ADDR_PM_BASE + $OFFS_PM_UNLOCK] [expr $UNLOCK_KEY +
$OFFS_MCCTRL]
+ mww [expr $ADDR_PM_BASE + $OFFS_MCCTRL] $MASK_MCCTRL_RC80M
+
+ global _MAXSPEED
+ adapter_khz $_MAXSPEED
+}
+
# Without SRST (wired to N_RESET) SAM4L won't reset cleanly
reset_config srst_only
-# SAM4L starts from POR with SYSCLK set to 115kHz RCLOCAL, needs slow JTAG
speed
-adapter_khz 15
+# SAM4L starts from POR with SYSCLK set to 115kHz RCLOCAL, needs slow JTAG
+adapter_khz $_SLOWSPEED
--
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